diff options
author | Alex Levin <levinale@chromium.org> | 2020-04-20 21:55:24 -0700 |
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committer | Furquan Shaikh <furquan@google.com> | 2020-04-27 05:54:56 +0000 |
commit | 34d9e68ff9026496fb262a2098ccdd2716bd8eb3 (patch) | |
tree | ad56298c38726b2f2fe4c4fd62cc590c89f3dcda /src/mainboard/google/volteer/variants/baseboard/gpio.c | |
parent | d6f7ec5f44810a3b7061df1be5c4be456e5852de (diff) | |
download | coreboot-34d9e68ff9026496fb262a2098ccdd2716bd8eb3.tar.gz coreboot-34d9e68ff9026496fb262a2098ccdd2716bd8eb3.tar.bz2 coreboot-34d9e68ff9026496fb262a2098ccdd2716bd8eb3.zip |
mb/google/volteer: add touchscreen entry to Volteer
BUG=b:149588766
TEST=ELAN and Goodix touchscreen works.
Signed-off-by: Alex Levin <levinale@chromium.org>
Change-Id: I1c3e75eb03a8ab434ee58bf36a155f2255612083
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard/gpio.c')
-rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/gpio.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index 1028dfad9fed..37211ff7965f 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -23,7 +23,7 @@ static const struct pad_config gpio_table[] = { /* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */ PAD_CFG_GPO(GPP_A7, 1, DEEP), /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ - PAD_CFG_GPO(GPP_A8, 1, DEEP), + PAD_CFG_GPO(GPP_A8, 0, DEEP), /* A9 : I2S2_TXD ==> EC_IN_RW_OD */ PAD_CFG_GPI(GPP_A9, NONE, DEEP), /* A10 : I2S2_RXD ==> EN_SPKR_PA */ @@ -125,7 +125,7 @@ static const struct pad_config gpio_table[] = { /* C9 : UART0_TXD ==> UART_PCH_TX_DEBUG_RX */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* C10 : UART0_RTS# ==> USI_RST_L */ - PAD_CFG_GPO(GPP_C10, 1, DEEP), + PAD_CFG_GPO(GPP_C10, 0, DEEP), /* C11 : UART0_CTS# ==> CVF_LPSS_INT_L */ PAD_CFG_GPI(GPP_C11, NONE, DEEP), /* C12 : UART1_RXD ==> MEM_STRAP_0 */ @@ -210,7 +210,7 @@ static const struct pad_config gpio_table[] = { /* E6 : THC0_SPI1_RST# ==> GPPE6_STRAP */ PAD_NC(GPP_E6, NONE), /* E7 : CPU_GP1 ==> USI_INT */ - PAD_CFG_GPI(GPP_E7, NONE, DEEP), + PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST, LEVEL, NONE), /* E8 : SPI1_CS1# ==> SLP_S0IX */ PAD_CFG_GPO(GPP_E8, 0, DEEP), /* E9 : USB2_OC0# ==> USB_C1_OC_ODL */ |