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| author | Furquan Shaikh <furquan@google.com> | 2021-08-24 13:43:51 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2021-09-13 22:43:12 +0000 |
| commit | 2306ee36f04aa79dd1064ee6b5841b20e21b7fde (patch) | |
| tree | 1a23b8be6ca2e6b48c36722c6ffe3b83b1d9ae43 /src/mainboard/google/volteer | |
| parent | bee831e95805a963c17a2bba186ce7babd3b92bf (diff) | |
| download | coreboot-2306ee36f04aa79dd1064ee6b5841b20e21b7fde.tar.gz coreboot-2306ee36f04aa79dd1064ee6b5841b20e21b7fde.tar.bz2 coreboot-2306ee36f04aa79dd1064ee6b5841b20e21b7fde.zip | |
mb/google/volteer: Enable USB4 resources using SoC Kconfig
This change uses the newly added `SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES`
Kconfig to enable USB4 resources and drops the configuration in
mainboard.
Change-Id: Id0951937cab8bf5432fc902ba7af21f56fe98087
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer')
| -rw-r--r-- | src/mainboard/google/volteer/Kconfig | 18 | ||||
| -rw-r--r-- | src/mainboard/google/volteer/Kconfig.name | 12 |
2 files changed, 6 insertions, 24 deletions
diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index 4885e4c9d8c6..0c77a79d5749 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -105,24 +105,6 @@ config MAINBOARD_PART_NUMBER default "Volet" if BOARD_GOOGLE_VOLET default "Chronicler" if BOARD_GOOGLE_CHRONICLER -if PCIEXP_HOTPLUG - -# Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569) -# Revision 0.7.6 Section 7.2.5.1.5 -config PCIEXP_HOTPLUG_BUSES - int - default 42 - -config PCIEXP_HOTPLUG_MEM - hex - default 0xc200000 # 194 MiB - -config PCIEXP_HOTPLUG_PREFETCH_MEM - hex - default 0x1c000000 # 448 MiB - -endif # PCIEXP_HOTPLUG - config TPM_TIS_ACPI_INTERRUPT int default 21 # GPE0_DW0_21 (GPP_C21) diff --git a/src/mainboard/google/volteer/Kconfig.name b/src/mainboard/google/volteer/Kconfig.name index 49fc8f3f6886..2f5d51d2ec15 100644 --- a/src/mainboard/google/volteer/Kconfig.name +++ b/src/mainboard/google/volteer/Kconfig.name @@ -46,7 +46,7 @@ config BOARD_GOOGLE_VOLTEER select BOARD_GOOGLE_BASEBOARD_VOLTEER select VARIANT_HAS_MIPI_CAMERA select INTEL_CAR_NEM - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_VOLTEER2 bool "-> Volteer2" @@ -54,7 +54,7 @@ config BOARD_GOOGLE_VOLTEER2 select VARIANT_HAS_MIPI_CAMERA select DRIVERS_GENESYSLOGIC_GL9755 select DRIVER_I2C_TPM_ACPI - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES # Reworked Volteer2 prototype, Haven chip replaced with Dauntless demo board config BOARD_GOOGLE_VOLTEER2_TI50 @@ -63,13 +63,13 @@ config BOARD_GOOGLE_VOLTEER2_TI50 select VARIANT_HAS_MIPI_CAMERA select DRIVERS_GENESYSLOGIC_GL9755 select DRIVER_I2C_TPM_ACPI - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_VOXEL bool "-> Voxel" select BOARD_GOOGLE_BASEBOARD_VOLTEER select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_ELEMI bool "-> Elemi" @@ -84,12 +84,12 @@ config BOARD_GOOGLE_DROBIT bool "-> Drobit" select BOARD_GOOGLE_BASEBOARD_VOLTEER select DRIVERS_GENESYSLOGIC_GL9755 - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_COPANO bool "-> Copano" select BOARD_GOOGLE_BASEBOARD_VOLTEER - select PCIEXP_HOTPLUG + select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES config BOARD_GOOGLE_COLLIS bool "-> Collis" |