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| author | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2022-11-11 14:59:50 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-16 13:49:53 +0000 |
| commit | 6da5e0bf377ffd0a9d6b0da8d5abc0f47c6355e1 (patch) | |
| tree | 09f0d463902481387ff93b2928ed25e7dc90c366 /src/mainboard/google/zork/variants/baseboard | |
| parent | f9c075d36d7f2d3070927bbe2df57ae08e904ea5 (diff) | |
| download | coreboot-6da5e0bf377ffd0a9d6b0da8d5abc0f47c6355e1.tar.gz coreboot-6da5e0bf377ffd0a9d6b0da8d5abc0f47c6355e1.tar.bz2 coreboot-6da5e0bf377ffd0a9d6b0da8d5abc0f47c6355e1.zip | |
mb/google/zork: Implement touchscreen power sequencing
As all variants have a touchscreen option, in baseboard tables set the
enable GPIO high and hold in reset during romstage, then release reset
in ramstage. This will allow the touchscreen to make use of the runtime
I2C detect feature (enabled in a subsequent commit) so that an ACPI
device entry is created only for the touchscreen actually present.
This mirrors the change to skyrim in commit f90ff456
(mb/google/skyrim: Implement touchscreen power sequencing)
Change-Id: Ifdd75cd96e7b6880085a3f47214b92948a56aa2e
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69456
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard')
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c | 14 | ||||
| -rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c | 14 |
2 files changed, 20 insertions, 8 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 3953a92e2d2d..5d68ee991758 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -64,7 +64,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* EC_AP_INT_ODL (Sensor Framesync) */ PAD_GPI(GPIO_31, PULL_NONE), /* EN_PWR_TOUCHSCREEN */ - PAD_GPO(GPIO_32, LOW), + PAD_GPO(GPIO_32, HIGH), /* GPIO_33 - GPIO_39: Not available */ /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), @@ -148,8 +148,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET_L */ - PAD_GPO(GPIO_140, LOW), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, HIGH), /* USB_HUB_RST_L */ PAD_GPO(GPIO_141, HIGH), /* SD_AUX_RESET_L */ @@ -354,7 +354,13 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size) return early_gpio_table; } -static const struct soc_amd_gpio romstage_gpio_table[] = {}; +static const struct soc_amd_gpio romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_32, HIGH), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, LOW), +}; const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) { diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 17c00db4a839..ef9eab2c659e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -108,7 +108,7 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { /* GPIO_89 - unused */ PAD_NC(GPIO_89), /* EN_PWR_TOUCHSCREEN */ - PAD_GPO(GPIO_90, LOW), + PAD_GPO(GPIO_90, HIGH), /* EN_SPKR */ PAD_GPO(GPIO_91, LOW), /* CLK_REQ0_L - WIFI */ @@ -160,8 +160,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET_L */ - PAD_GPO(GPIO_140, LOW), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, HIGH), /* UART1_RXD - FPMCU */ PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), /* SD_AUX_RESET_L */ @@ -403,7 +403,13 @@ const struct soc_amd_gpio *variant_early_gpio_table(size_t *size) return early_gpio_table; } -static const struct soc_amd_gpio romstage_gpio_table[] = {}; +static const struct soc_amd_gpio romstage_gpio_table[] = { + /* Enable touchscreen, hold in reset */ + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_32, HIGH), + /* TOUCHSCREEN_RESET_L */ + PAD_GPO(GPIO_140, LOW), +}; const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) { |