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| author | Rob Barnes <robbarnes@google.com> | 2020-10-01 15:03:25 -0600 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2020-10-08 22:43:13 +0000 |
| commit | 60d4f2411c93f5ee3b07b8978cfc282688536a65 (patch) | |
| tree | f0749fa57e8e8cfb1171da5f068e04cebc9b782b /src/mainboard/google/zork/variants/berknip | |
| parent | 0a304f65a2f628651476e28ddce0c56eb9a263ae (diff) | |
| download | coreboot-60d4f2411c93f5ee3b07b8978cfc282688536a65.tar.gz coreboot-60d4f2411c93f5ee3b07b8978cfc282688536a65.tar.bz2 coreboot-60d4f2411c93f5ee3b07b8978cfc282688536a65.zip | |
mb/google/zork/berknip: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs
don't have a pull-up resistor on the CMD line. These designs still boot
at 400 kHz despite not having the pull-up.
BUG=b:158766134
TEST=Boot Berknip w/ eMMC to OS.
BRANCH=zork
Change-Id: I5d55f55b8208b4dc3fbdc9d1ec6333f9e211e3fd
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45931
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/berknip')
| -rw-r--r-- | src/mainboard/google/zork/variants/berknip/overridetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 95629392e39f..674d5574be1a 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -38,6 +38,12 @@ chip soc/amd/picasso .early_init = true, }" + register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit |