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| author | Kevin Chiu <Kevin.Chiu@quantatw.com> | 2020-10-19 14:16:48 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-10-24 14:00:08 +0000 |
| commit | d3318cfe498bf53d8ce7d1cd55afad4a93705216 (patch) | |
| tree | 7124e5a55a51ce87d7bc6a4c4bc72a4741cf29da /src/mainboard/google/zork/variants/berknip | |
| parent | 062b92ef654a97648380a1a9a9fe34229ee76e31 (diff) | |
| download | coreboot-d3318cfe498bf53d8ce7d1cd55afad4a93705216.tar.gz coreboot-d3318cfe498bf53d8ce7d1cd55afad4a93705216.tar.bz2 coreboot-d3318cfe498bf53d8ce7d1cd55afad4a93705216.zip | |
mb/google/zork: update USB 2.0 controller Lane Parameter for berknip
Enhance USB 2.0 C0/C1 A0/A1 SI by increasing the level of
"HS DC Voltage Level" and " Disconnect Threshold Adjustment" registers.
COMPDISTUNE0: 0x3->0x7
TXVREFTUNE0: 0x6->0xf
BUG=b:166398726
BRANCH=zork
TEST=1. emerge-zork coreboot
2. check U2 register is set correctly.
3. U2 SI all pass
Change-Id: I69d942605c6d43ece0d71f67df3a5e00b998219b
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46545
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/berknip')
| -rw-r--r-- | src/mainboard/google/zork/variants/berknip/overridetree.cb | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 674d5574be1a..d97a2b578058 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -21,6 +21,54 @@ chip soc/amd/picasso register "telemetry_vddcr_soc_offset" = "0" # End : OPN Performance Configuration + # USB 2.0 strength + register "usb_2_port_tune_params[0]" = "{ + .com_pds_tune = 0x07, + .sq_rx_tune = 0x3, + .tx_fsls_tune = 0x3, + .tx_pre_emp_amp_tune = 0x03, + .tx_pre_emp_pulse_tune = 0x0, + .tx_rise_tune = 0x1, + .rx_vref_tune = 0xf, + .tx_hsxv_tune = 0x3, + .tx_res_tune = 0x01, + }" + + register "usb_2_port_tune_params[1]" = "{ + .com_pds_tune = 0x07, + .sq_rx_tune = 0x3, + .tx_fsls_tune = 0x3, + .tx_pre_emp_amp_tune = 0x03, + .tx_pre_emp_pulse_tune = 0x0, + .tx_rise_tune = 0x1, + .rx_vref_tune = 0xf, + .tx_hsxv_tune = 0x3, + .tx_res_tune = 0x01, + }" + + register "usb_2_port_tune_params[2]" = "{ + .com_pds_tune = 0x07, + .sq_rx_tune = 0x3, + .tx_fsls_tune = 0x3, + .tx_pre_emp_amp_tune = 0x03, + .tx_pre_emp_pulse_tune = 0x0, + .tx_rise_tune = 0x1, + .rx_vref_tune = 0xf, + .tx_hsxv_tune = 0x3, + .tx_res_tune = 0x01, + }" + + register "usb_2_port_tune_params[3]" = "{ + .com_pds_tune = 0x07, + .sq_rx_tune = 0x3, + .tx_fsls_tune = 0x3, + .tx_pre_emp_amp_tune = 0x03, + .tx_pre_emp_pulse_tune = 0x0, + .tx_rise_tune = 0x1, + .rx_vref_tune = 0xf, + .tx_hsxv_tune = 0x3, + .tx_res_tune = 0x01, + }" # Enable I2C2 for trackpad, touchscreen, pen at 400kHz register "i2c[2]" = "{ |