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| author | Kevin Chiu <kevin.chiu.17802@gmail.com> | 2021-02-09 16:18:11 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-11 10:17:35 +0000 |
| commit | 788eb99448fcda7fc4035299fb78d805136849d8 (patch) | |
| tree | 95503271cc4ead2954afcd25067dcf32e04fc653 /src/mainboard/google/zork/variants/dirinboz | |
| parent | d510b60f5b4eee6c165039be4acbe89ff25d8a4a (diff) | |
| download | coreboot-788eb99448fcda7fc4035299fb78d805136849d8.tar.gz coreboot-788eb99448fcda7fc4035299fb78d805136849d8.tar.bz2 coreboot-788eb99448fcda7fc4035299fb78d805136849d8.zip | |
mb/google/zork: modify ELAN TP i2c IRQ to LEVEL active for dirinboz
configure IRQs as level triggered to prevent TP lost.
BUG=None
BRANCH=zork
TEST=1. emerge-zork coreboot chromeos-bootimage
2. power on, suspend DUT to check TP is functional
Change-Id: I81ffa889fbdfb01bf3057a8258fb4dd4ad7e88d5
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50420
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/dirinboz')
| -rw-r--r-- | src/mainboard/google/zork/variants/dirinboz/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb index 283b1fc0e364..43f4ff7a4fdb 100644 --- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb @@ -111,7 +111,7 @@ chip soc/amd/picasso chip drivers/i2c/generic register "hid" = ""ELAN0000"" register "desc" = ""ELAN Touchpad"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" + register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_9)" register "wake" = "GEVENT_22" register "probed" = "1" device i2c 15 on end |