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| author | peichao.wang <peichao.wang@bitland.corp-partner.google.com> | 2020-07-21 09:36:11 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:27:25 +0000 |
| commit | 0358f7dadaac6c3c71c5d8a43c737d3b0a59134a (patch) | |
| tree | 0d84376ed35971be96e5276fb49f789ba03cd453 /src/mainboard/google/zork/variants/vilboz | |
| parent | 6d412d738c48c5e65da4e2054109726ba3f558d7 (diff) | |
| download | coreboot-0358f7dadaac6c3c71c5d8a43c737d3b0a59134a.tar.gz coreboot-0358f7dadaac6c3c71c5d8a43c737d3b0a59134a.tar.bz2 coreboot-0358f7dadaac6c3c71c5d8a43c737d3b0a59134a.zip | |
mb/google/vilboz: Tune I2C bus 3 clock
Tune I2C bus3 frequency and insure it meets I2C spec.
BUG=b:161650117
TEST=flash coreboot to the DUT and actual measured I2C bus3
make sure it meet Spec.
Signed-off-by: Peichao Wang <peichao.wang@bitland.corp-partner.google.com>
Change-Id: Ifa9f0bce723f55a12fd2313788c995f8326e3e7d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43661
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/vilboz')
| -rw-r--r-- | src/mainboard/google/zork/variants/vilboz/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index 0f374cb1ab6f..eb5c2dd41a1f 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -28,8 +28,8 @@ chip soc/amd/picasso # I2C3 for H1 register "i2c[3]" = "{ .speed = I2C_SPEED_FAST, - .rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */ - .fall_time_ns = 42, /* 1.26v to 0 */ + .rise_time_ns = 110, + .fall_time_ns = 5, .early_init = true, }" |