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| author | Rob Barnes <robbarnes@google.com> | 2020-10-01 15:17:27 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-12 08:36:53 +0000 |
| commit | 8d67da6b0d46f5a77285b404dc1f9e41117f5ab0 (patch) | |
| tree | d4b8705803265fb6fbb6eb7bf0c533f1639477c4 /src/mainboard/google/zork/variants/vilboz | |
| parent | 30f583264d0e9154804cbcdfd8c65518f5e3560f (diff) | |
| download | coreboot-8d67da6b0d46f5a77285b404dc1f9e41117f5ab0.tar.gz coreboot-8d67da6b0d46f5a77285b404dc1f9e41117f5ab0.tar.bz2 coreboot-8d67da6b0d46f5a77285b404dc1f9e41117f5ab0.zip | |
mb/google/zork/vilboz: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs
don't have a pull-up resistor on the CMD line. These designs still boot
at 400 kHz despite not having the pull-up.
BUG=b:158766134
TEST=Boot on Vilboz with emmc
BRANCH=zork
Signed-off-by: Rob Barnes <robbarnes@google.com>
Change-Id: I9a1e47dbee3fcc7317857d40c5418be30d755d61
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45933
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/vilboz')
| -rw-r--r-- | src/mainboard/google/zork/variants/vilboz/overridetree.cb | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index 3d9ff7c01b20..b75beafa34c6 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -41,6 +41,12 @@ chip soc/amd/picasso .early_init = true, }" + register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit |