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authorJohn Su <john_su@compal.corp-partner.google.com>2020-12-04 10:39:25 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-12-09 10:19:23 +0000
commite1c7cd9fb7be3d4f7ecd07fa1ca7ddf60553b875 (patch)
tree45aa833b4f4ad06b333edcd8d1d93258382a6667 /src/mainboard/google/zork/variants/vilboz
parenta6051440e24b9af2935ec1dda95d373e69ac1a72 (diff)
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mb/google/zork/var/vilboz: Update telemetry settings
Update telemetry settings. VDD Slope : 32643 -> 26939 VDD Offset: 208 -> 125 SOC Slope : 22742 -> 20001 SOC Offset: -83 -> 168 BUG=b:171668654 BRANCH=zork TEST=1. emerge-zork coreboot 2. pass AMD SDLE test report Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: Ic63e069310aa4a66cd4c9058790dbed37e6967f4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48288 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/vilboz')
-rw-r--r--src/mainboard/google/zork/variants/vilboz/overridetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
index a19443d0fb80..a3c2c978cf57 100644
--- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb
@@ -18,10 +18,10 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
- register "telemetry_vddcr_vdd_slope_mA" = "32643"
- register "telemetry_vddcr_vdd_offset" = "208"
- register "telemetry_vddcr_soc_slope_mA" = "22742"
- register "telemetry_vddcr_soc_offset" = "-83"
+ register "telemetry_vddcr_vdd_slope_mA" = "26939"
+ register "telemetry_vddcr_vdd_offset" = "125"
+ register "telemetry_vddcr_soc_slope_mA" = "20001"
+ register "telemetry_vddcr_soc_offset" = "168"
# USB OC pin mapping
register "usb_port_overcurrent_pin[1]" = "USB_OC_NONE" # LTE instead of USB C1