mb/google/zork: Configure GPIO_89 as PAD_NC

GPIO_89 was marked as EN_DEV_BEEP_L in pre-v3.6 schematics, but it was
never really used on any of the zork variants. Starting with v3.6,
GPIO_89 is left unused in schematics.

This change configures GPIO_89 as PAD_NC in baseboard GPIO
table. Since EN_DEV_BEEP_L still needs to be driven high to allow
speakers to work, GPIO_89 is configured as PAD_GPO driven high on
pre-v3.6 schematics.

BUG=b:62108046

Change-Id: I026cd6cb598667ce6e115c3ec9357a6a56051d39
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44190
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

10 files changed, 34 insertions, 4 deletions

diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index 4654ff718afd..e69b47fa4f1c 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -103,8 +103,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
 	PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE),
 	/* EMMC_DATA5 */
 	PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE),
-	/*  EN_DEV_BEEP_L */
-	PAD_GPO(GPIO_89, HIGH),
+	/* GPIO_89 - unused */
+	PAD_NC(GPIO_89),
 	/* RAM ID 1 */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* EN_SPKR */
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 5e61ad863037..bf25da3b0335 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -109,8 +109,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = {
 	PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE),
 	/* EMMC_DATA5 */
 	PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE),
-	/*  EN_DEV_BEEP_L */
-	PAD_GPO(GPIO_89, HIGH),
+	/* GPIO_89 - unused */
+	PAD_NC(GPIO_89),
 	/* EN_PWR_TOUCHSCREEN */
 	PAD_GPO(GPIO_90, LOW),
 	/* EN_SPKR */
diff --git a/src/mainboard/google/zork/variants/berknip/gpio.c b/src/mainboard/google/zork/variants/berknip/gpio.c
index e92bc1742ac5..8abe59f8e80a 100644
--- a/src/mainboard/google/zork/variants/berknip/gpio.c
+++ b/src/mainboard/google/zork/variants/berknip/gpio.c
@@ -20,6 +20,8 @@ static const struct soc_amd_gpio berknip_bid1_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_67, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
@@ -27,6 +29,8 @@ static const struct soc_amd_gpio berknip_bid1_gpio_set_stage_ram[] = {
 };
 
 static const struct soc_amd_gpio berknip_bid2_gpio_set_stage_ram[] = {
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* TP */
 	PAD_NC(GPIO_90),
 	/* USI_RESET */
diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c
index 20a2fa358e89..7600d4c8cea4 100644
--- a/src/mainboard/google/zork/variants/dalboz/gpio.c
+++ b/src/mainboard/google/zork/variants/dalboz/gpio.c
@@ -17,6 +17,8 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
 	PAD_NC(GPIO_32),
 	/* EN_PWR_TOUCHPAD_PS2 */
 	PAD_GPO(GPIO_67, HIGH),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* USI_RESET */
 	PAD_GPO(GPIO_140, HIGH),
 	/* Unused */
@@ -30,6 +32,8 @@ static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = {
 	PAD_NC(GPIO_32),
 	/* EN_PWR_TOUCHPAD_PS2 */
 	PAD_GPO(GPIO_67, HIGH),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* USI_RESET */
 	PAD_GPO(GPIO_140, HIGH),
 };
diff --git a/src/mainboard/google/zork/variants/dirinboz/gpio.c b/src/mainboard/google/zork/variants/dirinboz/gpio.c
index b79c1d67dce6..12b303a9c561 100644
--- a/src/mainboard/google/zork/variants/dirinboz/gpio.c
+++ b/src/mainboard/google/zork/variants/dirinboz/gpio.c
@@ -10,6 +10,8 @@
 static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
 	/* TP */
 	PAD_NC(GPIO_32),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* USI_RESET */
 	PAD_GPO(GPIO_140, HIGH),
 };
diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c
index 1bbc3018e027..f8664bb6cbde 100644
--- a/src/mainboard/google/zork/variants/ezkinil/gpio.c
+++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c
@@ -20,6 +20,8 @@ static const struct soc_amd_gpio ezkinil_bid1_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_67, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
@@ -39,6 +41,8 @@ static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = {
 	PAD_NC(GPIO_69),
 	/* MST_GPIO_2 (Fw Update HDMI hub) Change NC */
 	PAD_NC(GPIO_86),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* TP */
 	PAD_NC(GPIO_90),
 	/* USI_RESET */
@@ -50,6 +54,8 @@ static const struct soc_amd_gpio ezkinil_bid3_gpio_set_stage_ram[] = {
 	PAD_NC(GPIO_11),
 	/* FPMCU_BOOT0 Change NC */
 	PAD_NC(GPIO_69),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* TP */
 	PAD_NC(GPIO_90),
 	/* USI_RESET */
diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c
index 8376e8c62c9d..8da0de4f6007 100644
--- a/src/mainboard/google/zork/variants/morphius/gpio.c
+++ b/src/mainboard/google/zork/variants/morphius/gpio.c
@@ -22,6 +22,8 @@ static const struct soc_amd_gpio morphius_bid1_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_84, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
@@ -41,6 +43,8 @@ static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_67, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
@@ -48,6 +52,8 @@ static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = {
 };
 
 static const struct soc_amd_gpio morphius_bid3_gpio_set_stage_ram[] = {
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* TP */
 	PAD_NC(GPIO_90),
 	/* USI_RESET */
diff --git a/src/mainboard/google/zork/variants/trembyle/gpio.c b/src/mainboard/google/zork/variants/trembyle/gpio.c
index fc0d2c67df8d..9931479cc016 100644
--- a/src/mainboard/google/zork/variants/trembyle/gpio.c
+++ b/src/mainboard/google/zork/variants/trembyle/gpio.c
@@ -22,6 +22,8 @@ static const struct soc_amd_gpio trembyle_bid1_bid2_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_84, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
@@ -41,6 +43,8 @@ static const struct soc_amd_gpio trembyle_bid3_gpio_set_stage_ram[] = {
 	PAD_GPO(GPIO_67, HIGH),
 	/* MST_GPIO_2 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_86, PULL_NONE),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* MST_GPIO_3 (Fw Update HDMI hub) */
 	PAD_GPI(GPIO_90, PULL_NONE),
 	/* USI_RESET */
diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c
index b79c1d67dce6..12b303a9c561 100644
--- a/src/mainboard/google/zork/variants/vilboz/gpio.c
+++ b/src/mainboard/google/zork/variants/vilboz/gpio.c
@@ -10,6 +10,8 @@
 static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
 	/* TP */
 	PAD_NC(GPIO_32),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* USI_RESET */
 	PAD_GPO(GPIO_140, HIGH),
 };
diff --git a/src/mainboard/google/zork/variants/woomax/gpio.c b/src/mainboard/google/zork/variants/woomax/gpio.c
index d49388266ec9..968c622458f5 100644
--- a/src/mainboard/google/zork/variants/woomax/gpio.c
+++ b/src/mainboard/google/zork/variants/woomax/gpio.c
@@ -18,6 +18,8 @@ static const struct soc_amd_gpio woomax_gpio_set_stage_ram[] = {
 	PAD_NC(GPIO_69),
 	/* RAM_ID_4  */
 	PAD_NC(GPIO_84),
+	/* EN_DEV_BEEP_L */
+	PAD_GPO(GPIO_89, HIGH),
 	/* TP */
 	PAD_NC(GPIO_90),
 	/* USI_RESET */