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| author | Raihow Shi <raihow_shi@wistron.corp-partner.google.com> | 2022-09-15 21:05:29 +0800 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-09-20 08:01:12 +0000 |
| commit | 15d03094cbbe32edd449d8a4e12401e8a42adfbf (patch) | |
| tree | 3b45988af6c0583ee313e0e6c6d956024312f758 /src/mainboard/google | |
| parent | 517c5a8c547b4ea330d40e16edc3fe6e849505a0 (diff) | |
| download | coreboot-15d03094cbbe32edd449d8a4e12401e8a42adfbf.tar.gz coreboot-15d03094cbbe32edd449d8a4e12401e8a42adfbf.tar.bz2 coreboot-15d03094cbbe32edd449d8a4e12401e8a42adfbf.zip | |
mb/google/brask/variants/moli: enable ddc on DDI_PORT_2
Enable ddc on DDI_PORT_2 for support DP++.
BUG=b:240382609
TEST=emerge-brask coreboot.
Signed-off-by: Raihow Shi <raihow_shi@wistron.corp-partner.google.com>
Change-Id: I475e3c0278cfa92ab40ad84f6da580b4cded9933
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67663
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/moli/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index ab984e158be3..2d35e1411254 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -19,7 +19,7 @@ chip soc/intel/alderlake [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_1] = DDI_ENABLE_HPD, - [DDI_PORT_2] = DDI_ENABLE_HPD, + [DDI_PORT_2] = DDI_ENABLE_HPD | DDI_ENABLE_DDC, [DDI_PORT_3] = DDI_ENABLE_HPD, }" register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port2 |