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author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2021-08-10 11:24:36 +0800 |
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committer | Nick Vaccaro <nvaccaro@google.com> | 2021-08-12 17:48:07 +0000 |
commit | 866c182f87d496edd63c5d37db51dded2ed7a82d (patch) | |
tree | 8f178c71998b72c676896cfa00be7b42796a462c /src/mainboard/google | |
parent | 5310d52522dc4c958d8b2bea68d140cc8b696204 (diff) | |
download | coreboot-866c182f87d496edd63c5d37db51dded2ed7a82d.tar.gz coreboot-866c182f87d496edd63c5d37db51dded2ed7a82d.tar.bz2 coreboot-866c182f87d496edd63c5d37db51dded2ed7a82d.zip |
mb/google/brya/variants/gimble: Update GPIO for PP1800 DMIC enable
add GPP_D16 in gimle gpio.c and set value to 1 for PP1800 DMIC init sequence
BUG=b:195968649
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds
without error.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: Ia0639162e2c3f02f622470fa16c21fe8a067cf7c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56889
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/brya/variants/gimble/gpio.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/gpio.c b/src/mainboard/google/brya/variants/gimble/gpio.c index d47c732e6b07..6ce363c06ba2 100644 --- a/src/mainboard/google/brya/variants/gimble/gpio.c +++ b/src/mainboard/google/brya/variants/gimble/gpio.c @@ -47,6 +47,8 @@ static const struct pad_config override_gpio_table[] = { PAD_NC(GPP_D9, NONE), /* D15 : ISH_UART0_RTS# ==> NC */ PAD_NC(GPP_D15, NONE), + /* D16 : ISH_UART0_CTS# ==> EN_WCAM_PWR */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), /* D17 : UART1_RXD ==> NC */ PAD_NC(GPP_D17, NONE), |