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| author | Wenbin Mei <wenbin.mei@mediatek.com> | 2021-03-31 17:59:22 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-09 06:05:36 +0000 |
| commit | c4a9d7ae42fd54f74f666733574c0b4e9e3667b2 (patch) | |
| tree | d3ee90ef1b8db13e26b4cec496faa38415b5779f /src/mainboard/google | |
| parent | 918c8af50fe0eb58b61937e5cf64808767443320 (diff) | |
| download | coreboot-c4a9d7ae42fd54f74f666733574c0b4e9e3667b2.tar.gz coreboot-c4a9d7ae42fd54f74f666733574c0b4e9e3667b2.tar.bz2 coreboot-c4a9d7ae42fd54f74f666733574c0b4e9e3667b2.zip | |
mb/google/asurada: early-init eMMC
Some eMMCs need 80+ms for CMD1 to complete. And the payload may need to
access eMMC in the very early stage (for example, Depthcharge needs it
20ms after started) so we have to start initialization in coreboot.
On Hayato Chromebook this can save ~100ms in total.
BUG=b:177389446
TEST=emerge-asurada coreboot
BRANCH=asurada
Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Change-Id: I2f58d203e969dc1a13a479d7dc63b1b162a9ae3f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51973
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/asurada/mainboard.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/asurada/mainboard.c b/src/mainboard/google/asurada/mainboard.c index 16325c860246..86e8d5f82adc 100644 --- a/src/mainboard/google/asurada/mainboard.c +++ b/src/mainboard/google/asurada/mainboard.c @@ -16,6 +16,7 @@ #include <soc/gpio.h> #include <soc/gpio_common.h> #include <soc/i2c.h> +#include <soc/msdc.h> #include <soc/mtcmos.h> #include <soc/regulator.h> #include <soc/spm.h> @@ -25,6 +26,9 @@ #include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h> +#define MSDC0_BASE 0x11f60000 +#define MSDC0_TOP_BASE 0x11f50000 + #define MSDC0_DRV_MASK 0x3fffffff #define MSDC1_DRV_MASK 0x3ffff000 #define MSDC0_DRV_VALUE 0x24924924 @@ -154,6 +158,8 @@ static void configure_emmc(void) /* set eMMC cmd/dat/clk/ds/rstb pins driving to 10mA */ clrsetbits32(gpio_base, MSDC0_DRV_MASK, MSDC0_DRV_VALUE); + + mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE); } static void configure_sdcard(void) |