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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-08-30 12:50:46 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-12 12:31:12 +0000 |
| commit | d6ac209c74a2ce8d0d7f07390f62d447c02fedf3 (patch) | |
| tree | 5492ed576c901bb372fb0c1378e5e33c2a0938ef /src/mainboard/google | |
| parent | 63aca9233b96be13e227bba0dffee6e5e265fbb3 (diff) | |
| download | coreboot-d6ac209c74a2ce8d0d7f07390f62d447c02fedf3.tar.gz coreboot-d6ac209c74a2ce8d0d7f07390f62d447c02fedf3.tar.bz2 coreboot-d6ac209c74a2ce8d0d7f07390f62d447c02fedf3.zip | |
mb/google/brya/acpi: Remove erroneous _PR0/_PR3
The Linux kernel runtime D3 framework expects a PCIe device to have a
power resource in order to be properly power-manageable. The _PR0/_PR3
values were pointing at the PEG0 Device, which is not a PowerResource,
so this must have confused the RTD3 framework and RTD3 was not
functional. Removing the _PR0/_PR3 fixes the problem.
BUG=b:243888246
TEST=echo auto > /sys/bus/pci/devices/0000:01:00.0/power/control;
sleep 10;
echo on > /sys/bus/pci/devices/0000:01:00.0/power/control
After this there are no longer errors seen in dmesg about failing
to place the device into D0.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I83fa1e5fabd3257b097c10e7a13c9861872685ea
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67212
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/acpi/nvjt.asl | 2 | ||||
| -rw-r--r-- | src/mainboard/google/brya/acpi/nvop.asl | 2 | ||||
| -rw-r--r-- | src/mainboard/google/brya/acpi/power.asl | 17 |
3 files changed, 9 insertions, 12 deletions
diff --git a/src/mainboard/google/brya/acpi/nvjt.asl b/src/mainboard/google/brya/acpi/nvjt.asl index 64de3a7396a6..17011ec2dd3c 100644 --- a/src/mainboard/google/brya/acpi/nvjt.asl +++ b/src/mainboard/google/brya/acpi/nvjt.asl @@ -69,7 +69,7 @@ Method (NVJT, 2, Serialized) /* Get GCU GCx Sleep Status */ Case (NVJT_GPC_GSS) { - If (^_STA () != 0) + If (PSTA () != 0) { CGPS = 1 CGCS = 1 diff --git a/src/mainboard/google/brya/acpi/nvop.asl b/src/mainboard/google/brya/acpi/nvop.asl index 2cf84c697ddb..ecf962e18041 100644 --- a/src/mainboard/google/brya/acpi/nvop.asl +++ b/src/mainboard/google/brya/acpi/nvop.asl @@ -36,7 +36,7 @@ Method (NVOP, 2, Serialized) } /* Current GPU Control Status */ - If (\_SB.PCI0.PEG0.PGPR._STA == 1) + If (PSTA () == 1) { Local0 = 3 } diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl index fa5429d7bc67..2654394389af 100644 --- a/src/mainboard/google/brya/acpi/power.asl +++ b/src/mainboard/google/brya/acpi/power.asl @@ -405,23 +405,20 @@ Method (_PS3, 0, NotSerialized) } } -/* - * Normally, _ON and _OFF of the power resources listed in _PRx will be - * evaluated before entering D0/D3. However, for Optimus, the package - * should refer to the PCIe controller itself, not a dependent device. - */ -Name (_PR0, Package() { \_SB.PCI0.PEG0 }) -Name (_PR3, Package() { \_SB.PCI0.PEG0 }) - -Method (_STA, 0, Serialized) +Method (PSTA, 0, Serialized) { If (GC6E == GC6_STATE_EXITED && \_SB.PCI0.GTXS(GPIO_GPU_ALLRAILS_PG) == 1) { - Return (0xF) + Return (1) } Else { Return (0) } } + +Method (_STA, 0, Serialized) +{ + Return (0xF) +} |