soc/intel/xeon_sp/smihandler: Lock SMM_FEATURE_CONTROL on all sockets

Remove hardcoded B:D:F numbers for the first socket and pass the PCI
addresses to be locked within SMM by using the smm_pci_resource_store.

This allows to lock down SMM on all sockets without knowing the actual
bus topology or PCI segment group at compile time where the UBOX devices
reside on.

Tested: SMM is locked on all 4 sockets instead of just one.

Change-Id: Ica694911384005681662d3d7bed354a60bf08911
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80247
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 7 insertions, 1 deletions

diff --git a/src/mainboard/ibm/sbp1/ramstage.c b/src/mainboard/ibm/sbp1/ramstage.c
index 78db8c9fc8e6..d748b1b176fe 100644
--- a/src/mainboard/ibm/sbp1/ramstage.c
+++ b/src/mainboard/ibm/sbp1/ramstage.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
-
+#include <cpu/x86/smm.h>
 #include <soc/ramstage.h>
+#include <soc/smmrelocate.h>
 
 #include "include/spr_sbp1_gpio.h"
 #include <bootstate.h>
@@ -33,4 +34,9 @@ static void finalize_boot(void *unused)
 	gpio_output(GPPC_C17, 0);
 }
 
+void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size)
+{
+	soc_ubox_store_resources(slots, size);
+}
+
 BOOT_STATE_INIT_ENTRY(BS_PAYLOAD_BOOT, BS_ON_ENTRY, finalize_boot, NULL);