diff options
| author | Johnny Lin <johnny_lin@wiwynn.com> | 2023-05-11 09:40:58 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-23 20:26:13 +0000 |
| commit | b7dc12dc6c55f5664fb716095f9faea107a48771 (patch) | |
| tree | 60182f9dbf0c86ed28a03ce91934e5cfb10c5d74 /src/mainboard/intel/archercity_crb | |
| parent | f89cd1cf43b4afbd78dbf14ad71bfba92a28029f (diff) | |
| download | coreboot-b7dc12dc6c55f5664fb716095f9faea107a48771.tar.gz coreboot-b7dc12dc6c55f5664fb716095f9faea107a48771.tar.bz2 coreboot-b7dc12dc6c55f5664fb716095f9faea107a48771.zip | |
mb/intel/archercity_crb: Add EWL Hob processing for MRC error
Override the weak function mainboard_ewl_check() and select OCP_EWL.
Select IPMI_KCS_ROMSTAGE and IPMI_OCP for OCP IPMI commands which are
needed for OCP EWL driver, but they are Meta-specific BMC commands
and don't really work for AC, this change is just for a demonstration
with AC.
Note that FSP UPD promoteWarnings needs to be disabled so that
FSP won't block and can return to coreboot for EWL processing
when memory EWL type 3 error occurs.
Tested=On Intel AC, connected with a faulty DIMM can see
EWL type 3 error being generated and halted with coreboot log:
[DEBUG] Number of EWL entries 3
[ERROR] EWL type: 3 size:32 severity level:1
[ERROR] Major Warning Code = 0x29, Minor Warning Code = 0x04,
[ERROR] Major Checkpoint: 0xb7
[ERROR] Minor Checkpoint: 0x74
[ERROR] Socket 0
[ERROR] Channel 4
[ERROR] Dimm 0
[ERROR] Rank 0
[ERROR] IPMI: ipmi_get_board_config command failed (ret=3 resp=0xc1)
[DEBUG] ipmi send memory training error
[DEBUG] EWL type: 1 size:19 severity level:1
[DEBUG] 0x6392e968: 01 00 00 00 13 00 01 00 00 00 b7 74 0a 03 00 04
[DEBUG] 0x6392e978: 00 00 00
[DEBUG] EWL type: 1 size:19 severity level:1
[DEBUG] 0x6392e97b: 01 00 00 00 13 00 01 00 00 00 b7 74 0a 03 00 04
[DEBUG] 0x6392e98b: 00 00 01
[EMERG] Memory Training Error!
Change-Id: I4602ae356aa6e55ed0611b8ac9a206db127c297c
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75151
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/intel/archercity_crb')
| -rw-r--r-- | src/mainboard/intel/archercity_crb/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/intel/archercity_crb/romstage.c | 6 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/intel/archercity_crb/Kconfig b/src/mainboard/intel/archercity_crb/Kconfig index 656d3661db7b..ba675214a02b 100644 --- a/src/mainboard/intel/archercity_crb/Kconfig +++ b/src/mainboard/intel/archercity_crb/Kconfig @@ -5,6 +5,8 @@ config BOARD_SPECIFIC_OPTIONS select BOARD_ROMSIZE_KB_65536 select CONSOLE_OVERRIDE_LOGLEVEL select IPMI_KCS + select IPMI_KCS_ROMSTAGE + select IPMI_OCP select MEMORY_MAPPED_TPM select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_FSP2_0 @@ -13,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS select HAVE_ACPI_TABLES select MAINBOARD_USES_IFD_GBE_REGION select VPD + select OCP_EWL select OCP_VPD config MAINBOARD_DIR diff --git a/src/mainboard/intel/archercity_crb/romstage.c b/src/mainboard/intel/archercity_crb/romstage.c index 68025b484120..582fa50632ea 100644 --- a/src/mainboard/intel/archercity_crb/romstage.c +++ b/src/mainboard/intel/archercity_crb/romstage.c @@ -2,12 +2,18 @@ #include <console/console.h> #include <drivers/vpd/vpd.h> +#include <drivers/ocp/ewl/ocp_ewl.h> #include <drivers/ocp/include/vpd.h> #include <soc/romstage.h> #include <defs_cxl.h> #include <defs_iio.h> #include <sprsp_ac_iio.h> +void mainboard_ewl_check(void) +{ + get_ewl(); +} + static void mainboard_config_iio(FSPM_UPD *mupd) { int port; |