diff options
| author | Brenton Dong <brenton.m.dong@intel.com> | 2017-01-04 15:12:27 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-01-24 18:00:21 +0100 |
| commit | 5f1f0538cf46cea122c49cc103771fd839d24b37 (patch) | |
| tree | d0624e13368898997b40be69831d1f1af5d846fe /src/mainboard/intel/leafhill/Kconfig | |
| parent | b46c4ecaba97cc1edbfa2114651fc2bcbf49914b (diff) | |
| download | coreboot-5f1f0538cf46cea122c49cc103771fd839d24b37.tar.gz coreboot-5f1f0538cf46cea122c49cc103771fd839d24b37.tar.bz2 coreboot-5f1f0538cf46cea122c49cc103771fd839d24b37.zip | |
mainboard/intel: add leafhill board directory
This commit adds the initial scaffolding for the Intel Leafhill CRB
with Apollo Lake silicon.
The google/reef directory is used as a template. This commit only
makes the minimum changes to Kconfig and Kconfig.name needed for
the build bot to not have issues.
Change-Id: I088edee0e94ecfb4666fa31e08dbcfd24a81891b
Signed-off-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-on: https://review.coreboot.org/18038
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/intel/leafhill/Kconfig')
| -rw-r--r-- | src/mainboard/intel/leafhill/Kconfig | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig new file mode 100644 index 000000000000..30e16589010d --- /dev/null +++ b/src/mainboard/intel/leafhill/Kconfig @@ -0,0 +1,108 @@ + +config BOARD_GOOGLE_BASEBOARD_REEF + def_bool n + select SOC_INTEL_APOLLOLAKE + select BOARD_ROMSIZE_KB_16384 + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_LPC + select HAVE_ACPI_RESUME + select HAVE_ACPI_TABLES + select I2C_TPM + select MAINBOARD_HAS_CHROMEOS + select MAINBOARD_HAS_TPM2 + select MAINBOARD_HAS_I2C_TPM_CR50 + select TPM2 + select GOOGLE_SMBIOS_MAINBOARD_VERSION + +if BOARD_INTEL_LEAFHILL + +config BASEBOARD_REEF_LAPTOP + def_bool n + select SYSTEM_TYPE_LAPTOP + +config DRIVER_TPM_I2C_BUS + hex + default 0x2 + +config DRIVER_TPM_I2C_ADDR + hex + default 0x50 + +config DRIVER_TPM_I2C_IRQ + int + default 60 # GPE0_DW1_28 + +config CHROMEOS + select EC_GOOGLE_CHROMEEC_SWITCHES + select HAS_RECOVERY_MRC_CACHE + select MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN + select LID_SWITCH if BASEBOARD_REEF_LAPTOP + +config DRIVERS_I2C_DA7219 + default y + +config DRIVERS_I2C_GENERIC + default y + +config DRIVERS_I2C_WACOM + default y + +config DRIVERS_PS2_KEYBOARD + default y + +config DRIVERS_GENERIC_GPIO_REGULATOR + default y + +config MAINBOARD_DIR + string + default intel/leafhill + +config VARIANT_DIR + string + default "reef" + default "pyro" if BOARD_GOOGLE_PYRO + default "snappy" if BOARD_GOOGLE_SNAPPY + +config DEVICETREE + string + default "variants/pyro/devicetree.cb" if BOARD_GOOGLE_PYRO + default "variants/snappy/devicetree.cb" if BOARD_GOOGLE_SNAPPY + default "variants/baseboard/devicetree.cb" + +config MAINBOARD_PART_NUMBER + string + default "Reef" + default "Pyro" if BOARD_GOOGLE_PYRO + default "Snappy" if BOARD_GOOGLE_SNAPPY + +config MAINBOARD_FAMILY + string + default "Google_Reef" + +config GBB_HWID + string + depends on CHROMEOS + default "REEF TEST 3240" if BOARD_GOOGLE_REEF + default "PYRO TEST 0290" if BOARD_GOOGLE_PYRO + default "SNAPPY TEST 1088" if BOARD_GOOGLE_SNAPPY + +config MAX_CPUS + int + default 8 + +config UART_FOR_CONSOLE + int + default 2 + +config INCLUDE_NHLT_BLOBS + bool "Include blobs for audio." + select NHLT_DMIC_1CH_16B + select NHLT_DMIC_2CH_16B + select NHLT_DMIC_4CH_16B + select NHLT_DA7219 + select NHLT_MAX98357 + +config DRIVERS_GENERIC_MAX98357A + default y + +endif # BOARD_INTEL_LEAFHILL |