diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-10-08 09:51:33 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-01-24 21:42:17 +0000 |
| commit | dc324792be2dc2579f28661e515844817ba90271 (patch) | |
| tree | d6c3569c8b3944ac5875c92a04ab650f01910ff4 /src/mainboard/lenovo/g505s/acpi | |
| parent | 9dfa63b3fd893f9edf9da4ebc37653eceb53bfd8 (diff) | |
| download | coreboot-dc324792be2dc2579f28661e515844817ba90271.tar.gz coreboot-dc324792be2dc2579f28661e515844817ba90271.tar.bz2 coreboot-dc324792be2dc2579f28661e515844817ba90271.zip | |
mb/lenovo/g505s: Convert to ASL 2.0 syntax
Change-Id: I56f844706ba6bde3e57a6a81ff1d8e16863913f2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46189
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/lenovo/g505s/acpi')
| -rw-r--r-- | src/mainboard/lenovo/g505s/acpi/gpe.asl | 8 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/acpi/mainboard.asl | 6 | ||||
| -rw-r--r-- | src/mainboard/lenovo/g505s/acpi/sleep.asl | 16 |
3 files changed, 15 insertions, 15 deletions
diff --git a/src/mainboard/lenovo/g505s/acpi/gpe.asl b/src/mainboard/lenovo/g505s/acpi/gpe.asl index 910d2e66a83e..f1376069748e 100644 --- a/src/mainboard/lenovo/g505s/acpi/gpe.asl +++ b/src/mainboard/lenovo/g505s/acpi/gpe.asl @@ -15,7 +15,7 @@ Scope(\_GPE) { /* Start Scope GPE */ /* USB controller PME# */ Method(_L0B) { - Store("USB PME", Debug) + Debug = "USB PME" /* Notify devices of wake event */ Notify(\_SB.PCI0.UOH1, 0x02) Notify(\_SB.PCI0.UOH2, 0x02) @@ -37,16 +37,16 @@ Scope(\_GPE) { /* Start Scope GPE */ /* Lid switch opened or closed */ Method(_L16) { - Store("Lid status changed", Debug) + Debug = "Lid status changed" /* Flip trigger polarity */ - Not(LPOL, LPOL) + LPOL = ~LPOL /* Notify lid object of status change */ Notify(\_SB.LID, 0x80) } /* GPIO0 or GEvent8 event */ Method(_L18) { - Store("PCI bridge wake event", Debug) + Debug = "PCI bridge wake event" /* Notify PCI bridges of wake event */ Notify(\_SB.PCI0.PBR4, 0x02) Notify(\_SB.PCI0.PBR5, 0x02) diff --git a/src/mainboard/lenovo/g505s/acpi/mainboard.asl b/src/mainboard/lenovo/g505s/acpi/mainboard.asl index dd3318e3ccf2..be686309ca4b 100644 --- a/src/mainboard/lenovo/g505s/acpi/mainboard.asl +++ b/src/mainboard/lenovo/g505s/acpi/mainboard.asl @@ -56,7 +56,7 @@ */ Method (PNOT) { - Store("Received PNOT call (probably from EC)", Debug) + Debug = "Received PNOT call (probably from EC)" /* TODO: Implement this */ } @@ -75,7 +75,7 @@ Scope (\_SB) { /* Make sure lid trigger polarity is set so that we * trigger an SCI when lid status changes. */ - Not(GE22, LPOL) + LPOL = ~GE22 } } @@ -95,7 +95,7 @@ Scope (\_SB) { /* Toggle wireless */ Method (WLTG) { - Store( Not(GP57), GP57 ) + GP57 = ~GP57 } /* Return lid state */ Method (LIDS) diff --git a/src/mainboard/lenovo/g505s/acpi/sleep.asl b/src/mainboard/lenovo/g505s/acpi/sleep.asl index dde9c37cd00c..cd714cec874e 100644 --- a/src/mainboard/lenovo/g505s/acpi/sleep.asl +++ b/src/mainboard/lenovo/g505s/acpi/sleep.asl @@ -26,20 +26,20 @@ Method(\_PTS, 1) { /* DBGO("\n") */ /* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/ /* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(\_SB.SBRI, 0x13)) { - * Store(0,\_SB.PWDE) + /*if (\_SB.SBRI <= 0x13) { + * \_SB.PWDE = 0 *} */ /* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0 - Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(\_PTS) */ /* @@ -64,7 +64,7 @@ Method(\_WAK, 1) { /* DBGO(" to S0\n") */ /* Re-enable HPET */ - Store(1,USBS) + USBS = 1 Return(WKST) } /* End Method(\_WAK) */ |