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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-05-15 21:12:31 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-05-29 20:29:28 +0000 |
| commit | e39db681dfd7c4127f1ac0e360e0930e72ef3ee3 (patch) | |
| tree | 4f2e3ff9086fcc84047076e6125d14999cdb762d /src/mainboard/lenovo/t430s/variants/t430s/romstage.c | |
| parent | 27d02d8286aff64115ae593a189c38fdaf3ce769 (diff) | |
| download | coreboot-e39db681dfd7c4127f1ac0e360e0930e72ef3ee3.tar.gz coreboot-e39db681dfd7c4127f1ac0e360e0930e72ef3ee3.tar.bz2 coreboot-e39db681dfd7c4127f1ac0e360e0930e72ef3ee3.zip | |
src/mainboard: Add missing 'include <types.h>'
<types.h> is supposed to provide <stdint.h> and <stddef.h>.
So when <types.h> is included, <stdint.h> and/or <stddef.h> is removed.
Change-Id: I3b1a395cfe8b710fb6b468e68f4c92e063794568
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/mainboard/lenovo/t430s/variants/t430s/romstage.c')
| -rw-r--r-- | src/mainboard/lenovo/t430s/variants/t430s/romstage.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c index e461681f1901..5bc7b8096140 100644 --- a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c +++ b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c @@ -22,6 +22,7 @@ #include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <ec/lenovo/pmh7/pmh7.h> +#include <types.h> const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 0 }, /* P0:, OC 0 */ |