summaryrefslogtreecommitdiffstats
path: root/src/mainboard/nvidia
diff options
context:
space:
mode:
authorPaul Menzel <pmenzel@molgen.mpg.de>2016-07-28 17:20:20 +0200
committerMartin Roth <martinroth@google.com>2016-07-31 18:44:00 +0200
commit95fe8fb1e0ce2ccf2d079898c27c799e4b0db928 (patch)
tree146616d6cc75ce8a4c2fbb10ee4084aa764d2a0a /src/mainboard/nvidia
parent14caed85e121ca623d0ec4b9fba6d5bb64c8c46b (diff)
downloadcoreboot-95fe8fb1e0ce2ccf2d079898c27c799e4b0db928.tar.gz
coreboot-95fe8fb1e0ce2ccf2d079898c27c799e4b0db928.tar.bz2
coreboot-95fe8fb1e0ce2ccf2d079898c27c799e4b0db928.zip
mainboard: Format irq_tables.c
Run the command below to format the files `irq_tables.c` of (mostly AMD) mainboards correctly with GNU indent 2.2.10. ``` $ git grep -l 'if (sum != pirq->checksum) {' | xargs indent -l ``` Fix up the following two checkpatch.pl errors manually. ``` ERROR: that open brace { should be on the previous line #1219: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:129: + uint8_t reg[8] = + { 0x41, 0x42, 0x43, 0x44, 0x60, 0x61, 0x62, 0x63 }; ERROR: that open brace { should be on the previous line #1221: FILE: src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c:131: + uint8_t irq[8] = + { 0x0A, 0X0B, 0X0, 0X0a, 0X0B, 0X05, 0X0, 0X07 }; ``` This is needed, so that follow-up commits, fixing checkpatch.pl errors and warnings, won’t run into conflicts with the git commit hooks, when for example, spaces instead of tabs are used for indentation. Change-Id: If254723f3013377fb3b9b08dd5eca6b76730ec4a Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/15932 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/nvidia')
-rw-r--r--src/mainboard/nvidia/l1_2pvv/irq_tables.c55
1 files changed, 30 insertions, 25 deletions
diff --git a/src/mainboard/nvidia/l1_2pvv/irq_tables.c b/src/mainboard/nvidia/l1_2pvv/irq_tables.c
index 0396812c788b..061d276b783f 100644
--- a/src/mainboard/nvidia/l1_2pvv/irq_tables.c
+++ b/src/mainboard/nvidia/l1_2pvv/irq_tables.c
@@ -24,26 +24,26 @@
#include <cpu/amd/amdk8_sysconf.h>
#include "mb_sysconf.h"
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
- uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
- uint8_t slot, uint8_t rfu)
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus,
+ uint8_t devfn, uint8_t link0, uint16_t bitmap0,
+ uint8_t link1, uint16_t bitmap1, uint8_t link2,
+ uint16_t bitmap2, uint8_t link3, uint16_t bitmap3,
+ uint8_t slot, uint8_t rfu)
{
pirq_info->bus = bus;
pirq_info->devfn = devfn;
- pirq_info->irq[0].link = link0;
- pirq_info->irq[0].bitmap = bitmap0;
- pirq_info->irq[1].link = link1;
- pirq_info->irq[1].bitmap = bitmap1;
- pirq_info->irq[2].link = link2;
- pirq_info->irq[2].bitmap = bitmap2;
- pirq_info->irq[3].link = link3;
- pirq_info->irq[3].bitmap = bitmap3;
+ pirq_info->irq[0].link = link0;
+ pirq_info->irq[0].bitmap = bitmap0;
+ pirq_info->irq[1].link = link1;
+ pirq_info->irq[1].bitmap = bitmap1;
+ pirq_info->irq[2].link = link2;
+ pirq_info->irq[2].bitmap = bitmap2;
+ pirq_info->irq[3].link = link3;
+ pirq_info->irq[3].bitmap = bitmap3;
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
-
-
unsigned long write_pirq_routing_table(unsigned long addr)
{
@@ -54,10 +54,10 @@ unsigned long write_pirq_routing_table(unsigned long addr)
struct mb_sysconf_t *m;
unsigned sbdn;
- uint8_t sum=0;
+ uint8_t sum = 0;
int i;
- get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
+ get_bus_conf(); // it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c
sbdn = sysconf.sbdn;
m = sysconf.mb;
@@ -69,13 +69,13 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
pirq = (void *)(addr);
- v = (uint8_t *)(addr);
+ v = (uint8_t *) (addr);
pirq->signature = PIRQ_SIGNATURE;
- pirq->version = PIRQ_VERSION;
+ pirq->version = PIRQ_VERSION;
pirq->rtr_bus = m->bus_mcp55;
- pirq->rtr_devfn = ((sbdn+6)<<3)|0;
+ pirq->rtr_devfn = ((sbdn + 6) << 3) | 0;
pirq->exclusive_irqs = 0;
@@ -86,19 +86,24 @@ unsigned long write_pirq_routing_table(unsigned long addr)
memset(pirq->rfu, 0, sizeof(pirq->rfu));
- pirq_info = (void *) ( &pirq->checksum + 1);
+ pirq_info = (void *)(&pirq->checksum + 1);
slot_num = 0;
//pci bridge
- write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
- pirq_info++; slot_num++;
+ write_pirq_info(pirq_info, m->bus_mcp55, ((sbdn + 6) << 3) | 0, 0x1,
+ 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
+ pirq_info++;
+ slot_num++;
for (i = 1; i < sysconf.hc_possible_num; i++) {
- if(!(sysconf.pci1234[i] & 0x1) ) continue;
+ if (!(sysconf.pci1234[i] & 0x1))
+ continue;
unsigned busn = (sysconf.pci1234[i] >> 16) & 0xff;
unsigned devn = sysconf.hcdn[i] & 0xff;
- write_pirq_info(pirq_info, busn, (devn<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
- pirq_info++; slot_num++;
+ write_pirq_info(pirq_info, busn, (devn << 3) | 0, 0x1, 0xdef8,
+ 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
+ pirq_info++;
+ slot_num++;
}
pirq->size = 32 + 16 * slot_num;
@@ -114,6 +119,6 @@ unsigned long write_pirq_routing_table(unsigned long addr)
printk(BIOS_INFO, "done.\n");
- return (unsigned long) pirq_info;
+ return (unsigned long)pirq_info;
}