mb/ocp/deltalake: Make use of vpd_get_int to clean up code

Tested=On OCP Delta Lake, verify the VPD values can be read
correctly.

Change-Id: I1c27cb61cd52902c92b3733e53bc8e6fd6a5fe7f
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

4 files changed, 20 insertions, 29 deletions

diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c
index 415b26d5d8c5..7adbcf244425 100644
--- a/src/mainboard/ocp/deltalake/ipmi.c
+++ b/src/mainboard/ocp/deltalake/ipmi.c
@@ -100,9 +100,8 @@ enum cb_err ipmi_set_post_start(const int port)
 
 void init_frb2_wdt(void)
 {
-	char val[VPD_LEN];
-	uint8_t enable, action;
-	uint16_t countdown;
+	uint8_t enable;
+	int action, countdown;
 
 	if (vpd_get_bool(FRB2_TIMER, VPD_RW_THEN_RO, &enable)) {
 		printk(BIOS_DEBUG, "Got VPD %s value: %d\n", FRB2_TIMER, enable);
@@ -113,8 +112,7 @@ void init_frb2_wdt(void)
 	}
 
 	if (enable) {
-		if (vpd_gets(FRB2_COUNTDOWN, val, VPD_LEN, VPD_RW_THEN_RO)) {
-			countdown = (uint16_t)atol(val);
+		if (vpd_get_int(FRB2_COUNTDOWN, VPD_RW_THEN_RO, &countdown)) {
 			printk(BIOS_DEBUG, "FRB2 timer countdown set to: %d ms\n",
 				countdown * 100);
 		} else {
@@ -123,15 +121,15 @@ void init_frb2_wdt(void)
 			countdown = FRB2_COUNTDOWN_DEFAULT;
 		}
 
-		if (vpd_gets(FRB2_ACTION, val, VPD_LEN, VPD_RW_THEN_RO)) {
-			action = (uint8_t)atol(val);
+		if (vpd_get_int(FRB2_ACTION, VPD_RW_THEN_RO, &action)) {
 			printk(BIOS_DEBUG, "FRB2 timer action set to: %d\n", action);
 		} else {
 			printk(BIOS_DEBUG, "FRB2 timer action use default value: %d\n",
 				FRB2_ACTION_DEFAULT);
 			action = FRB2_ACTION_DEFAULT;
 		}
-		ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, countdown, action);
+		ipmi_init_and_start_bmc_wdt(CONFIG_BMC_KCS_BASE, (uint16_t)countdown,
+			(uint8_t)action);
 	} else {
 		printk(BIOS_DEBUG, "Disable FRB2 timer\n");
 		ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE);
diff --git a/src/mainboard/ocp/deltalake/loglevel_vpd.c b/src/mainboard/ocp/deltalake/loglevel_vpd.c
index 3faf37a0ead7..78808797a8c1 100644
--- a/src/mainboard/ocp/deltalake/loglevel_vpd.c
+++ b/src/mainboard/ocp/deltalake/loglevel_vpd.c
@@ -9,10 +9,8 @@
 int get_console_loglevel(void)
 {
 	int log_level = COREBOOT_LOG_LEVEL_DEFAULT;
-	char val_str[VPD_LEN];
 
-	if (vpd_gets(COREBOOT_LOG_LEVEL, val_str, VPD_LEN, VPD_RW_THEN_RO)) {
-		log_level = (int)atol(val_str);
+	if (vpd_get_int(COREBOOT_LOG_LEVEL, VPD_RW_THEN_RO, &log_level)) {
 		if (log_level < 0 || log_level >= BIOS_NEVER)
 			log_level = COREBOOT_LOG_LEVEL_DEFAULT;
 	}
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index f0cdd3dbb762..9b182a215c3c 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -19,7 +19,7 @@
 static void mainboard_config_upd(FSPM_UPD *mupd)
 {
 	uint8_t val;
-	char val_str[VPD_LEN];
+	int val_int;
 
 	/* Send FSP log message to SOL */
 	if (vpd_get_bool(FSP_LOG, VPD_RW_THEN_RO, &val))
@@ -33,15 +33,14 @@ static void mainboard_config_upd(FSPM_UPD *mupd)
 
 	if (mupd->FspmConfig.SerialIoUartDebugEnable) {
 		/* FSP debug log level */
-		if (vpd_gets(FSP_LOG_LEVEL, val_str, VPD_LEN, VPD_RW_THEN_RO)) {
-			val = (uint8_t)atol(val_str);
-			if (val > 0x0f) {
+		if (vpd_get_int(FSP_LOG_LEVEL, VPD_RW_THEN_RO, &val_int)) {
+			if (val_int < 0 || val_int > 0x0f) {
 				printk(BIOS_DEBUG, "Invalid DebugPrintLevel value from VPD: "
-					"%d\n", val);
-				val = FSP_LOG_LEVEL_DEFAULT;
+					"%d\n", val_int);
+				val_int = FSP_LOG_LEVEL_DEFAULT;
 			}
-			printk(BIOS_DEBUG, "Setting DebugPrintLevel %d from VPD\n", val);
-			mupd->FspmConfig.DebugPrintLevel = val;
+			printk(BIOS_DEBUG, "Setting DebugPrintLevel %d from VPD\n", val_int);
+			mupd->FspmConfig.DebugPrintLevel = (uint8_t)val_int;
 		} else {
 			printk(BIOS_INFO, "Not able to get VPD %s, default set "
 				"DebugPrintLevel to %d\n", FSP_LOG_LEVEL,
@@ -65,15 +64,14 @@ static void mainboard_config_upd(FSPM_UPD *mupd)
 	 * Following code is effective when MemRefreshWaterMark patch is added to FSP
 	 * and when corresponding VPD variable is set.
 	 */
-	if (vpd_gets(FSPM_MEMREFRESHWATERMARK, val_str, VPD_LEN, VPD_RW_THEN_RO)) {
-		val = (uint8_t)atol(val_str);
-		if (val > 2) {
+	if (vpd_get_int(FSPM_MEMREFRESHWATERMARK, VPD_RW_THEN_RO, &val_int)) {
+		if (val_int < 0 || val_int > 2) {
 			printk(BIOS_DEBUG, "Invalid MemRefreshWatermark value from VPD: "
-				"%d\n", val);
-			val = FSPM_MEMREFRESHWATERMARK_DEFAULT;
+				"%d\n", val_int);
+			val_int = FSPM_MEMREFRESHWATERMARK_DEFAULT;
 		}
-		printk(BIOS_DEBUG, "Setting MemRefreshWatermark %d from VPD\n", val);
-		mupd->FspmConfig.UnusedUpdSpace0[0] = val;
+		printk(BIOS_DEBUG, "Setting MemRefreshWatermark %d from VPD\n", val_int);
+		mupd->FspmConfig.UnusedUpdSpace0[0] = (uint8_t)val_int;
 	}
 }
 
diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h
index 71a3b092023f..82989ffd78a3 100644
--- a/src/mainboard/ocp/deltalake/vpd.h
+++ b/src/mainboard/ocp/deltalake/vpd.h
@@ -3,9 +3,6 @@
 #ifndef DELTALAKE_VPD_H
 #define DELTALAKE_VPD_H
 
-/* VPD variable maximum length */
-#define VPD_LEN 10
-
 /* VPD variable for enabling/disabling FRB2 timer. 1/0: Enable/disable */
 #define FRB2_TIMER "frb2_timer_enable"
 #define FRB2_TIMER_DEFAULT 1 /* Default value when the VPD variable is not found */