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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-18 19:26:05 +0300 |
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committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2021-02-01 10:33:44 +0000 |
commit | df84a28ccc5fd1392c09e88880e7ae3d87a45a4e (patch) | |
tree | 594f42c3f74af2521c3f005031657a1c321cc5ae /src/mainboard/pcengines/apu2/gpio_ftns.c | |
parent | b8a82496fe587f6f619a8efb4e091de9ffc63a9e (diff) | |
download | coreboot-df84a28ccc5fd1392c09e88880e7ae3d87a45a4e.tar.gz coreboot-df84a28ccc5fd1392c09e88880e7ae3d87a45a4e.tar.bz2 coreboot-df84a28ccc5fd1392c09e88880e7ae3d87a45a4e.zip |
mb/pcengines/apu2: Switch to proper GPIO API
Use the abstractions <gpio.h> provides.
Change-Id: I348ba43a76287be5b24012ae3dfc28ed783da9c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/mainboard/pcengines/apu2/gpio_ftns.c')
-rw-r--r-- | src/mainboard/pcengines/apu2/gpio_ftns.c | 69 |
1 files changed, 5 insertions, 64 deletions
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c index c249c2da5ca7..28b9a742dd19 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.c +++ b/src/mainboard/pcengines/apu2/gpio_ftns.c @@ -1,68 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <amdblocks/acpimmio.h> -#include <console/console.h> -#include <device/mmio.h> -#include <FchPlatform.h> +#include <gpio.h> #include "gpio_ftns.h" -static u32 gpio_read_wrapper(u32 iomux_gpio) -{ - u32 gpio = iomux_gpio << 2; - - if (gpio < 0x100) - return gpio0_read32(gpio & 0xff); - else if (gpio >= 0x100 && gpio < 0x200) - return gpio1_read32(gpio & 0xff); - else if (gpio >= 0x200 && gpio < 0x300) - return gpio2_read32(gpio & 0xff); - - die("Invalid GPIO"); -} - -static void gpio_write_wrapper(u32 iomux_gpio, u32 setting) -{ - u32 gpio = iomux_gpio << 2; - - if (gpio < 0x100) - gpio0_write32(gpio & 0xff, setting); - else if (gpio >= 0x100 && gpio < 0x200) - gpio1_write32(gpio & 0xff, setting); - else if (gpio >= 0x200 && gpio < 0x300) - gpio2_write32(gpio & 0xff, setting); -} - -void configure_gpio(u32 gpio, u8 iomux_ftn, u32 setting) -{ - u32 bdata; - - bdata = gpio_read_wrapper(gpio); - /* out the data value to prevent glitches */ - bdata |= (setting & GPIO_OUTPUT_ENABLE); - gpio_write_wrapper(gpio, bdata); - - /* set direction and data value */ - bdata |= (setting & (GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE - | GPIO_PULL_UP_ENABLE | GPIO_PULL_DOWN_ENABLE)); - gpio_write_wrapper(gpio, bdata); - - iomux_write8(gpio, iomux_ftn & 0x3); -} - -u8 read_gpio(u32 gpio) -{ - return (gpio_read_wrapper(gpio) & GPIO_PIN_STS) ? 1 : 0; -} - -void write_gpio(u32 gpio, u8 value) -{ - u32 status = gpio_read_wrapper(gpio); - status &= ~GPIO_OUTPUT_VALUE; - status |= (value > 0) ? GPIO_OUTPUT_VALUE : 0; - gpio_write_wrapper(gpio, status); -} - int get_spd_offset(void) { u8 index = 0; @@ -70,10 +11,10 @@ int get_spd_offset(void) * One SPD file contains all 4 options, determine which index to * read here, then call into the standard routines. */ - if (gpio1_read8(0x02) & BIT0) - index |= BIT0; - if (gpio1_read8(0x06) & BIT0) - index |= BIT1; + if (gpio_get(GPIO_49)) + index |= 1 << 0; + if (gpio_get(GPIO_50)) + index |= 1 << 1; return index; } |