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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-28 13:58:57 +0100 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-11-30 21:53:21 +0000 |
| commit | cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d (patch) | |
| tree | e2b3e2dd802f898e6ddabf047f79ea6a86b293fb /src/mainboard/scaleway | |
| parent | c9c5e84d6fa68280e25d1f1a3d0f0454d39a55ad (diff) | |
| download | coreboot-cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d.tar.gz coreboot-cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d.tar.bz2 coreboot-cf9fc1ddfebffc76eaf86aae9ae8afbe9ab5925d.zip | |
soc/intel/fsp_baytrail: Rework acpi/cpu.asl
Use acpigen_write_processor_cnot to implement notifications to the CPU.
Change-Id: I01e4397b9a1c15eff4b856cbc697fa2b4bc9761f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29893
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/mainboard/scaleway')
0 files changed, 0 insertions, 0 deletions