diff options
| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-06-28 22:54:42 +0300 |
|---|---|---|
| committer | Michael Niewöhner <c0d3z3r0@review.coreboot.org> | 2020-07-24 23:40:45 +0000 |
| commit | ae9ddd465d93103e4833f20d1ba83614269acd07 (patch) | |
| tree | eb5f2fc31c05e4262f25d5ac6d5b80a872dc95bb /src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h | |
| parent | 68c7eff5fe958eeceb203e95405b57555e2d3567 (diff) | |
| download | coreboot-ae9ddd465d93103e4833f20d1ba83614269acd07.tar.gz coreboot-ae9ddd465d93103e4833f20d1ba83614269acd07.tar.bz2 coreboot-ae9ddd465d93103e4833f20d1ba83614269acd07.zip | |
supermicro/x11-lga1151/gpio: 3/4 Fixes some field macro
Fixes some bit fields to convert to target macros PAD_CFG_*() macros.
This is part of the patch set
"mb/supermicro/x11-lga1151: Rewrite pad config using intelp2m":
CB:42916 - 1/4 Decode raw register values
CB:42917 - 2/4 Exclude fields for PAD_CFG
CB:42918 - 3/4 Fixes some field macro
CB:35679 - 4/4 Convert field macros to PAD_CFG
Change-Id: I291f5f0f34505c466b610aa4049c8cc35937d140
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42918
Reviewed-by: Michael Niewöhner
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h index d12d7b661d47..303439527165 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h @@ -71,7 +71,7 @@ static const struct pad_config gpio_table[] = { /* GPP_A12 - GPIO */ /* PAD_CFG_GPO(GPP_A12, 1, PLTRST), */ _PAD_CFG_STRUCT(GPP_A12, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_BUF(RX_DISABLE) | 1, 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1, 0), /* GPP_A13 - SUSWARN# */ /* PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), */ @@ -158,7 +158,7 @@ static const struct pad_config gpio_table[] = { /* GPP_B6 - GPIO */ /* PAD_NC(GPP_B6, NONE), */ _PAD_CFG_STRUCT(GPP_B6, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPP_B7 - GPIO */ /* PAD_NC(GPP_B7, NONE), */ @@ -300,7 +300,7 @@ static const struct pad_config gpio_table[] = { /* GPP_C14 - GPIO */ /* PAD_NC(GPP_C14, NONE), */ _PAD_CFG_STRUCT(GPP_C14, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPP_C15 - GPIO */ /* PAD_NC(GPP_C15, NONE), */ @@ -346,12 +346,12 @@ static const struct pad_config gpio_table[] = { /* GPP_C23 - GPIO */ /* PAD_NC(GPP_C23, NONE), */ _PAD_CFG_STRUCT(GPP_C23, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPP_D0 - GPIO */ /* PAD_NC(GPP_D0, NONE), */ _PAD_CFG_STRUCT(GPP_D0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPP_D1 - GPIO */ /* PAD_CFG_GPO(GPP_D1, 1, DEEP), */ @@ -563,7 +563,8 @@ static const struct pad_config gpio_table[] = { /* GPP_F5 - GPIO */ /* PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), */ _PAD_CFG_STRUCT(GPP_F5, - PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_TRIG(LEVEL) | + PAD_BUF(TX_DISABLE), 0), /* GPP_F6 - GPIO */ /* PAD_CFG_GPO(GPP_F6, 1, PLTRST), */ @@ -898,12 +899,12 @@ static const struct pad_config gpio_table[] = { /* GPD0 - GPIO */ /* PAD_NC(GPD0, NONE), */ _PAD_CFG_STRUCT(GPD0, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPD1 - GPIO */ /* PAD_NC(GPD1, NONE), */ _PAD_CFG_STRUCT(GPD1, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPD2 - LAN_WAKE# */ /* PAD_CFG_NF(GPD2, NONE, PWROK, NF1), */ @@ -933,7 +934,7 @@ static const struct pad_config gpio_table[] = { /* GPD7 - GPIO */ /* PAD_NC(GPD7, NONE), */ _PAD_CFG_STRUCT(GPD7, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPD8 - SUSCLK */ /* PAD_CFG_NF(GPD8, NONE, PWROK, NF1), */ @@ -943,17 +944,17 @@ static const struct pad_config gpio_table[] = { /* GPD9 - GPIO */ /* PAD_NC(GPD9, NONE), */ _PAD_CFG_STRUCT(GPD9, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPD10 - GPIO */ /* PAD_NC(GPD10, NONE), */ _PAD_CFG_STRUCT(GPD10, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPD11 - GPIO */ /* PAD_NC(GPD11, NONE), */ _PAD_CFG_STRUCT(GPD11, - PAD_FUNC(GPIO) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), + PAD_FUNC(GPIO) | PAD_RESET(DEEP) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE), 0), /* GPP_I0 - DDPB_HPD0 */ /* PAD_CFG_NF(GPP_I0, NONE, DEEP, NF1), */ |