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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-19 12:31:21 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-21 07:16:01 +0000 |
| commit | f50ea988b09e7201e129848ab64e6e0e69bf56c4 (patch) | |
| tree | e7cf17631d7c3cd41fa3c68a4c578d4ee7e36b8a /src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h | |
| parent | dadcbfbe8c682c89b277fdbdfdd26cabd15fc20a (diff) | |
| download | coreboot-f50ea988b09e7201e129848ab64e6e0e69bf56c4.tar.gz coreboot-f50ea988b09e7201e129848ab64e6e0e69bf56c4.tar.bz2 coreboot-f50ea988b09e7201e129848ab64e6e0e69bf56c4.zip | |
soc/intel,mb/*: get rid of legacy pad macros
Get rid of legacy pad macros by replacing them with their newer
equivalents.
TEST: TIMELESS-built board images match
Change-Id: I078f9bb3c78f642afc6dcfd64d77be823a4485c2
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h index bbaad7d8c6cb..a6db277891bd 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/include/variant/gpio.h @@ -80,13 +80,13 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_C19, NONE), PAD_NC(GPP_C20, NONE), PAD_NC(GPP_C21, NONE), - PAD_CFG_GPI_ACPI_SMI(GPP_C22, 20K_PU, DEEP, NONE), + PAD_CFG_GPI_SMI(GPP_C22, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_C23, NONE), /* GPIO Group GPP_D */ PAD_NC(GPP_D0, NONE), PAD_CFG_GPO(GPP_D1, 1, DEEP), - PAD_CFG_GPI_NMI(GPP_D2, 20K_PU, DEEP, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, NONE), PAD_NC(GPP_D3, NONE), PAD_CFG_GPO(GPP_D4, 0, PLTRST), PAD_NC(GPP_D5, NONE), @@ -116,7 +116,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_E3, NONE), PAD_NC(GPP_E4, NONE), PAD_NC(GPP_E5, NONE), - PAD_CFG_GPI_NMI(GPP_E6, 20K_PU, PLTRST, EDGE_SINGLE, NONE), + PAD_CFG_GPI_NMI(GPP_E6, UP_20K, PLTRST, EDGE_SINGLE, NONE), PAD_NC(GPP_E7, NONE), PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), @@ -130,7 +130,7 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_F2, NONE), PAD_NC(GPP_F3, NONE), PAD_NC(GPP_F4, NONE), - PAD_CFG_GPI_APIC(GPP_F5, NONE, PLTRST), + PAD_CFG_GPI_APIC_HIGH(GPP_F5, NONE, PLTRST), PAD_CFG_GPO(GPP_F6, 1, PLTRST), PAD_CFG_GPO(GPP_F7, 1, PLTRST), PAD_CFG_GPO(GPP_F8, 1, PLTRST), |