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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-07-25 09:20:25 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-09-23 08:48:20 +0000 |
| commit | bd17f7b87779abc9c749cf4bf243307c705d9b47 (patch) | |
| tree | b5b4d6011cea1d60484e9d47a7c9583ae999550e /src/mainboard/up | |
| parent | 6d787c2590920fc5ea222d692004818bbed6b3e5 (diff) | |
| download | coreboot-bd17f7b87779abc9c749cf4bf243307c705d9b47.tar.gz coreboot-bd17f7b87779abc9c749cf4bf243307c705d9b47.tar.bz2 coreboot-bd17f7b87779abc9c749cf4bf243307c705d9b47.zip | |
mb/up/squared: Fill LPDDR4 dimm info
Fill the dimm info struct to make SMBIOS type 17 appear.
TESTED=Up Squared
Change-Id: I4de63362c8fea8a886594cdcf0eec48421afb605
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34564
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/up')
| -rw-r--r-- | src/mainboard/up/squared/romstage.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/src/mainboard/up/squared/romstage.c b/src/mainboard/up/squared/romstage.c index 5bef64d6f9e8..f9f0cfc42428 100644 --- a/src/mainboard/up/squared/romstage.c +++ b/src/mainboard/up/squared/romstage.c @@ -16,6 +16,7 @@ #include <string.h> #include <soc/romstage.h> #include <soc/gpio_apl.h> +#include <soc/meminit.h> #include <fsp/api.h> #include <FspmUpd.h> #include <console/console.h> @@ -29,6 +30,39 @@ */ static const uint8_t memory_skuid_pads[] = { GPIO_214, GPIO_215 }; +static const struct lpddr4_sku skus[] = { + /* Samsung 280 K4F8E304HB-MGCJ 8Gb dual-ch */ + [0] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_8Gb_DENSITY, + .ch1_rank_density = 0, + .ch0_dual_rank = 0, + .ch1_dual_rank = 0, + .part_num = "K4F8E304HB-MGCJ", + }, + [1] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_8Gb_DENSITY, + .ch1_rank_density = LP4_8Gb_DENSITY, + .ch0_dual_rank = 0, + .ch1_dual_rank = 0, + .part_num = "K4F8E304HB-MGCJ", + }, + [2] = { + .speed = LP4_SPEED_2400, + .ch0_rank_density = LP4_16Gb_DENSITY, + .ch1_rank_density = LP4_16Gb_DENSITY, + .ch0_dual_rank = 1, + .ch1_dual_rank = 1, + .part_num = "K4F6E304HB-MGCJ", + }, +}; + +static const struct lpddr4_cfg lp4cfg = { + .skus = skus, + .num_skus = ARRAY_SIZE(skus), +}; + static const uint8_t ch0_bit_swizzling[] = { 0x0D, 0x0A, 0x08, 0x0B, 0x0C, 0x0F, 0x0E, 0x09, 0x06, 0x00, 0x03, 0x04, 0x07, 0x01, 0x05, 0x02, @@ -157,3 +191,8 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) memcpy(config->Ch3_Bit_swizzling, &ch3_bit_swizzling, sizeof(ch3_bit_swizzling)); } + +void mainboard_save_dimm_info(void) +{ + save_lpddr4_dimm_info(&lp4cfg, get_memory_skuid()); +} |