summaryrefslogtreecommitdiffstats
path: root/src/mainboard
diff options
context:
space:
mode:
authorMyles Watson <mylesgw@gmail.com>2009-10-23 22:53:26 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-23 22:53:26 +0000
commit036c15fe71c4ec69e4403e0957f6c84357177d49 (patch)
tree9447dc64aba1ba9fdea2bb622454c80f6ea56314 /src/mainboard
parentc21b5ee58470c16b4f31578fe19d10e66cb914ad (diff)
downloadcoreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.tar.gz
coreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.tar.bz2
coreboot-036c15fe71c4ec69e4403e0957f6c84357177d49.zip
Drop dead K8_SCAN_PCI_BUS code. It's a bad idea to scan the PCI busses before
RAM is initialized, and no one does it. Trivial. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4830 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/broadcom/blast/cache_as_ram_auto.c3
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/hp/dl145_g3/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8s2/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8x/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms7260/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/msi/ms9185/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/sunw/ultra40/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dme/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2895/cache_as_ram_auto.c1
-rw-r--r--src/mainboard/tyan/s2912/cache_as_ram_auto.c2
16 files changed, 0 insertions, 29 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index b39ae1ed3403..a3e2b164a55e 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
index 5ac6f4be9f08..3b94d3fd3282 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
@@ -1,9 +1,6 @@
#define ASSEMBLY 1
#define __ROMCC__
-
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
#if CONFIG_LOGICAL_CPUS==1
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
index e81dc4c210a0..056cd0833158 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
@@ -27,8 +27,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
index 812878892a15..26e5ee985eb0 100644
--- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
index f786d9fdec13..0f54f46af20c 100644
--- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
+++ b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
@@ -31,7 +31,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
index f4213c1ec361..76e56f80a4c1 100644
--- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
index e702d0e5fa39..78b1de980d5b 100644
--- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
index e702d0e5fa39..78b1de980d5b 100644
--- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
@@ -10,10 +10,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 0
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
index 6458a65bde70..ed84a426b2da 100644
--- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
@@ -31,7 +31,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-// #define K8_SCAN_PCI_BUS 1 /* ? */
#define QRANK_DIMM_SUPPORT 1
#if CONFIG_LOGICAL_CPUS == 1
#define SET_NB_CFG_54 1
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
index b95d55a91aa0..95704b9791d3 100644
--- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
@@ -35,10 +35,8 @@
#define QRANK_DIMM_SUPPORT 1
//used by incoherent_ht
-//#define K8_SCAN_PCI_BUS 1
//#define K8_ALLOCATE_IO_RANGE 1
-
//used by init_cpus and fidvid
#define K8_SET_FIDVID 1
//if we want to wait for core1 done before DQS training, set it to 0
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
index 9962aefec682..04fa546f6a42 100644
--- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
index 18af54280975..468e04975076 100644
--- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
+++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
@@ -3,8 +3,6 @@
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
index 18435a61f2e4..151b2d0a4a1e 100644
--- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
@@ -22,7 +22,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-// #define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
index 3a9b0ca3755d..672f551fa1f6 100644
--- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
index 0e144eb29c69..77bd04d33070 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
@@ -2,7 +2,6 @@
#define __ROMCC__
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
index c27e74b2c101..8fb6473499ec 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
@@ -25,8 +25,6 @@
#define RAMINIT_SYSINFO 1
#define K8_ALLOCATE_IO_RANGE 1
-//#define K8_SCAN_PCI_BUS 1
-
#define QRANK_DIMM_SUPPORT 1
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-30 00:23:23 +0000