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author | Angel Pons <th3fanbus@gmail.com> | 2020-11-24 15:39:26 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-30 08:03:18 +0000 |
commit | 13c50005c5e11bdf132e43dd72df0b8d263c7deb (patch) | |
tree | 6a21e68f1add715f2e0ded7de057ea141524afe3 /src/mainboard | |
parent | fe17a8cd6a2e734bd1bb8be45a41b3e1d46ab904 (diff) | |
download | coreboot-13c50005c5e11bdf132e43dd72df0b8d263c7deb.tar.gz coreboot-13c50005c5e11bdf132e43dd72df0b8d263c7deb.tar.bz2 coreboot-13c50005c5e11bdf132e43dd72df0b8d263c7deb.zip |
mb/prodrive/hermes: Use PCH_DEV_SMBUS definition
This allows dropping ugly preprocessor usage from this file.
Change-Id: Idb66d295129d98725f38d11ac162978418bd94c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47959
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/prodrive/hermes/eeprom.c | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/src/mainboard/prodrive/hermes/eeprom.c b/src/mainboard/prodrive/hermes/eeprom.c index 94811f68d163..fee40a078381 100644 --- a/src/mainboard/prodrive/hermes/eeprom.c +++ b/src/mainboard/prodrive/hermes/eeprom.c @@ -31,14 +31,8 @@ bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_off { int ret = 0; -#if ENV_ROMSTAGE - pci_devfn_t dev = PCI_DEV(0, PCH_DEV_SLOT_LPC, 4); -#else - const struct device *dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 4); -#endif - - u32 smb_ctrl_reg = pci_read_config32(dev, HOSTC); - pci_write_config32(dev, HOSTC, smb_ctrl_reg | HOSTC_I2C_EN); + u32 smb_ctrl_reg = pci_read_config32(PCH_DEV_SMBUS, HOSTC); + pci_write_config32(PCH_DEV_SMBUS, HOSTC, smb_ctrl_reg | HOSTC_I2C_EN); printk(BIOS_SPEW, "%s\tOffset: %04zx\tSize: %02zx\n", __func__, read_offset, size); @@ -61,7 +55,7 @@ bool read_write_config(u8 addr, void *blob, size_t read_offset, size_t write_off } /* Restore I2C_EN bit */ - pci_write_config32(dev, HOSTC, smb_ctrl_reg); + pci_write_config32(PCH_DEV_SMBUS, HOSTC, smb_ctrl_reg); return ret; } |