summaryrefslogtreecommitdiffstats
path: root/src/mainboard
diff options
context:
space:
mode:
authorMartin Roth <martinroth@chromium.org>2021-06-25 15:28:43 -0600
committerMartin Roth <martinroth@google.com>2021-06-28 17:12:02 +0000
commit53435eac5117461ac9ec1739755d5bec43a8c14e (patch)
treeafa62780574a9f37a0e130f5b10d5c5a425ad448 /src/mainboard
parentfe58977e6fe2501e2ae50ce9a6bd1790e47eadb8 (diff)
downloadcoreboot-53435eac5117461ac9ec1739755d5bec43a8c14e.tar.gz
coreboot-53435eac5117461ac9ec1739755d5bec43a8c14e.tar.bz2
coreboot-53435eac5117461ac9ec1739755d5bec43a8c14e.zip
mb/google/guybrush: Configure eSPI requirements before setting it up
When initializing eSPI early, guybrush has requirements to configure the bus properly. Those are normally run in bootblock_mainboard_early_init, but when setting up eSPI early, those have not run yet. BUG=192100564 TEST=Build along with previous patch, eSPI works on guybrush Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ifec6113d48aea0bb5efe47909e4faf0161148a99 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55864 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/guybrush/bootblock.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c
index 46875ff43da2..f9f1ab034f49 100644
--- a/src/mainboard/google/guybrush/bootblock.c
+++ b/src/mainboard/google/guybrush/bootblock.c
@@ -1,12 +1,25 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpimmio.h>
+#include <amdblocks/espi.h>
#include <bootblock_common.h>
#include <baseboard/variants.h>
#include <console/console.h>
#include <device/pci_ops.h>
#include <soc/pci_devs.h>
+void mb_set_up_early_espi(void)
+{
+ /*
+ * We don't need to initialize all of the GPIOs that are done
+ * in bootblock_mainboard_early_init(), but we need to release
+ * the EC eSPI reset and do the rest of the configuration.
+ *
+ * This will not be present in the normal boot flow.
+ */
+ bootblock_mainboard_early_init();
+}
+
void bootblock_mainboard_early_init(void)
{
size_t num_gpios;