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authorFelix Held <felix-coreboot@felixheld.de>2022-02-23 16:32:20 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-25 17:44:11 +0000
commit972d9f2cce2792b847c4c1879f5b52c19585c37c (patch)
tree87166acd957448e6b262a331106e7a276806043c /src/mainboard
parent887d4ed912ef80afbf7827150f52e207edc9c033 (diff)
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arch/x86: consolidate HPET base address definitions
Both the HPET_BASE_ADDRESS define from arch/x86/include/arch/hpet.h and the HPET_ADDRESS Kconfig option define the base address of the HPET MMIO region which is 0xfed00000 on all chipsets and SoCs in the coreboot tree. Since these two different constants are used in different places that however might end up used in the same coreboot build, drop the Kconfig option and use the definition from arch/x86 instead. Since it's no longer needed to check for a mismatch of those two constants, the corresponding checks are dropped too. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia797bb8ac150ae75807cb3bd1f9db5b25dfca35e Reviewed-on: https://review.coreboot.org/c/coreboot/+/62307 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c4
-rw-r--r--src/mainboard/google/butterfly/early_init.c3
-rw-r--r--src/mainboard/google/link/early_init.c3
-rw-r--r--src/mainboard/google/parrot/early_init.c3
-rw-r--r--src/mainboard/google/stout/early_init.c3
-rw-r--r--src/mainboard/intel/dcp847ske/romstage.c3
-rw-r--r--src/mainboard/intel/emeraldlake2/early_init.c3
-rw-r--r--src/mainboard/kontron/ktqm77/early_init.c3
-rw-r--r--src/mainboard/lenovo/x220/early_init.c3
-rw-r--r--src/mainboard/roda/rv11/variants/rv11/early_init.c3
-rw-r--r--src/mainboard/roda/rv11/variants/rw11/early_init.c3
-rw-r--r--src/mainboard/samsung/lumpy/early_init.c3
-rw-r--r--src/mainboard/samsung/stumpy/early_init.c3
13 files changed, 27 insertions, 13 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
index ddac440e5c45..374ff9dd71b2 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
@@ -1,4 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/hpet.h>
#include <bootblock_common.h>
#include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -89,7 +91,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c
index d1173b544697..073e7992f19f 100644
--- a/src/mainboard/google/butterfly/early_init.c
+++ b/src/mainboard/google/butterfly/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
@@ -82,7 +83,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/google/link/early_init.c b/src/mainboard/google/link/early_init.c
index 265b13ac6fbe..d3209d0490cb 100644
--- a/src/mainboard/google/link/early_init.c
+++ b/src/mainboard/google/link/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <string.h>
#include <device/pci_ops.h>
@@ -91,7 +92,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c
index 81616979a7c6..f4769a13430c 100644
--- a/src/mainboard/google/parrot/early_init.c
+++ b/src/mainboard/google/parrot/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit.h>
@@ -60,7 +61,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c
index 920c4206cd78..b33f57c205ec 100644
--- a/src/mainboard/google/stout/early_init.c
+++ b/src/mainboard/google/stout/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -97,7 +98,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c
index ada0a5cac7a1..023248640339 100644
--- a/src/mainboard/intel/dcp847ske/romstage.c
+++ b/src/mainboard/intel/dcp847ske/romstage.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#if CONFIG(USE_NATIVE_RAMINIT)
@@ -21,7 +22,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/intel/emeraldlake2/early_init.c b/src/mainboard/intel/emeraldlake2/early_init.c
index 54baafb74375..11b3121b6ce4 100644
--- a/src/mainboard/intel/emeraldlake2/early_init.c
+++ b/src/mainboard/intel/emeraldlake2/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
@@ -58,7 +59,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c
index 8305648e1486..521695b9ba9b 100644
--- a/src/mainboard/kontron/ktqm77/early_init.c
+++ b/src/mainboard/kontron/ktqm77/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <bootblock_common.h>
#include <stdint.h>
#include <device/pnp_def.h>
@@ -63,7 +64,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/lenovo/x220/early_init.c b/src/mainboard/lenovo/x220/early_init.c
index edb5324a2d61..7a9163dc29d2 100644
--- a/src/mainboard/lenovo/x220/early_init.c
+++ b/src/mainboard/lenovo/x220/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <acpi/acpi.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -19,7 +20,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/roda/rv11/variants/rv11/early_init.c b/src/mainboard/roda/rv11/variants/rv11/early_init.c
index 3d5b3ba2a731..9386620c537e 100644
--- a/src/mainboard/roda/rv11/variants/rv11/early_init.c
+++ b/src/mainboard/roda/rv11/variants/rv11/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
@@ -17,7 +18,7 @@ void mainboard_fill_pei_data(struct pei_data *const pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/roda/rv11/variants/rw11/early_init.c b/src/mainboard/roda/rv11/variants/rw11/early_init.c
index d36c8f99be05..b3378ba42855 100644
--- a/src/mainboard/roda/rv11/variants/rw11/early_init.c
+++ b/src/mainboard/roda/rv11/variants/rw11/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <bootblock_common.h>
#include <stdint.h>
#include <device/pnp_ops.h>
@@ -47,7 +48,7 @@ void mainboard_fill_pei_data(struct pei_data *const pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c
index a885f5b2a154..26c882624e07 100644
--- a/src/mainboard/samsung/lumpy/early_init.c
+++ b/src/mainboard/samsung/lumpy/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
@@ -123,7 +124,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c
index dbfc2d2d03c8..dfb1f4d09bb9 100644
--- a/src/mainboard/samsung/stumpy/early_init.c
+++ b/src/mainboard/samsung/stumpy/early_init.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/hpet.h>
#include <bootblock_common.h>
#include <stdint.h>
#include <pc80/mc146818rtc.h>
@@ -108,7 +109,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
.smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = CONFIG_HPET_ADDRESS,
+ .hpet_address = HPET_BASE_ADDRESS,
.rcba = (uintptr_t)DEFAULT_RCBA,
.pmbase = DEFAULT_PMBASE,
.gpiobase = DEFAULT_GPIOBASE,
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-26 13:04:28 +0000