diff options
| author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-07-01 13:51:39 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-05 00:39:14 +0000 |
| commit | cd4264fbe7c78ed280b965200e9fd15ec95546bc (patch) | |
| tree | 8bc10445219b61755a05257f4b44b9c949a7e01b /src/mainboard | |
| parent | 1b44c81d3dc21abf417578dacdc37c13dce28727 (diff) | |
| download | coreboot-cd4264fbe7c78ed280b965200e9fd15ec95546bc.tar.gz coreboot-cd4264fbe7c78ed280b965200e9fd15ec95546bc.tar.bz2 coreboot-cd4264fbe7c78ed280b965200e9fd15ec95546bc.zip | |
mb/google/nissa: Lock gpio pins for nissa variants
There is a new ground rule, variant should honor baseboard lock gpios.
Thus, lock the gpio which is locked in baseboard.
BUG=b:216671701
TEST=check gpios are locked in pinctrl dump.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I61931b0b2f1f936a672e72c98b83d66ba0059bf3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/craask/gpio.c | 4 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/nereid/gpio.c | 10 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/nivviks/gpio.c | 20 |
3 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/google/brya/variants/craask/gpio.c b/src/mainboard/google/brya/variants/craask/gpio.c index cc14d4c01af5..cb5b996328fa 100644 --- a/src/mainboard/google/brya/variants/craask/gpio.c +++ b/src/mainboard/google/brya/variants/craask/gpio.c @@ -12,9 +12,9 @@ static const struct pad_config override_gpio_table[] = { /* D7 : WLAN_CLKREQ_ODL */ PAD_NC(GPP_D7, NONE), /* F12 : WWAN_RST_L */ - PAD_CFG_GPO(GPP_F12, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), /* H3 : WLAN_PCIE_WAKE_ODL */ - PAD_NC(GPP_H3, NONE), + PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), }; /* Early pad configuration in bootblock */ diff --git a/src/mainboard/google/brya/variants/nereid/gpio.c b/src/mainboard/google/brya/variants/nereid/gpio.c index 6b2cb7a1f417..8aa28f4b4695 100644 --- a/src/mainboard/google/brya/variants/nereid/gpio.c +++ b/src/mainboard/google/brya/variants/nereid/gpio.c @@ -13,16 +13,16 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPO(GPP_A22, 1, DEEP), /* B5 : SOC_I2C_SUB_SDA */ - PAD_NC(GPP_B5, NONE), + PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG), /* B6 : SOC_I2C_SUB_SCL */ - PAD_NC(GPP_B6, NONE), + PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG), /* D3 : WCAM_RST_L */ - PAD_NC(GPP_D3, NONE), + PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), /* D15 : EN_PP2800_WCAM_X */ - PAD_NC(GPP_D15, NONE), + PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG), /* D16 : EN_PP1800_PP1200_WCAM_X */ - PAD_NC(GPP_D16, NONE), + PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG), /* H22 : WCAM_MCLK_R */ PAD_NC(GPP_H22, NONE), diff --git a/src/mainboard/google/brya/variants/nivviks/gpio.c b/src/mainboard/google/brya/variants/nivviks/gpio.c index 1fdebfc032c1..73b3a8cdf7e5 100644 --- a/src/mainboard/google/brya/variants/nivviks/gpio.c +++ b/src/mainboard/google/brya/variants/nivviks/gpio.c @@ -13,9 +13,9 @@ static const struct pad_config board_id0_overrides[] = { /* D7 : WLAN_CLKREQ_ODL */ PAD_NC(GPP_D7, NONE), /* F12 : WWAN_RST_L */ - PAD_CFG_GPO(GPP_F12, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), /* H3 : WLAN_PCIE_WAKE_ODL */ - PAD_NC(GPP_H3, NONE), + PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), /* R4 : I2S2_SCLK ==> I2S_SPK_BCLK_R */ PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), /* R5 : I2S2_SFRM ==> I2S_SPK_LRCK_R */ @@ -45,29 +45,29 @@ static const struct pad_config override_gpio_table[] = { /* D7 : WLAN_CLKREQ_ODL */ PAD_NC(GPP_D7, NONE), /* F12 : WWAN_RST_L */ - PAD_CFG_GPO(GPP_F12, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), /* H3 : WLAN_PCIE_WAKE_ODL */ - PAD_NC(GPP_H3, NONE), + PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), }; /* Pad configuration in ramstage for nirwen */ static const struct pad_config override_gpio_table_nirwen[] = { /* B4 : SSD_PERST_L */ - PAD_CFG_GPO(GPP_B4, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), /* D6 : SRCCLKREQ1# ==> SSD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7 : WLAN_CLKREQ_ODL */ PAD_NC(GPP_D7, NONE), /* D11 : EN_PP3300_SSD */ - PAD_CFG_GPO(GPP_D11, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_D11, 1, LOCK_CONFIG), /* E13 : SRCCLKREQ1# ==> WWAN_EN */ - PAD_CFG_GPO(GPP_E13, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_E13, 1, LOCK_CONFIG), /* E17 : SSD_PLN_L */ - PAD_CFG_GPO(GPP_E17, 1, PLTRST), + PAD_CFG_GPO_LOCK(GPP_E17, 1, LOCK_CONFIG), /* F12 : WWAN_RST_L */ - PAD_CFG_GPO(GPP_F12, 1, DEEP), + PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), /* H3 : WLAN_PCIE_WAKE_ODL */ - PAD_NC(GPP_H3, NONE), + PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), }; /* Early pad configuration in bootblock for nivviks */ |