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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-03-23 21:34:20 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-25 20:02:56 +0000 |
| commit | 99eab34b9ed25065a0b4c3ebd051aa0155c77e6c (patch) | |
| tree | 2174f32226a818ae78066d29551d80fe44d707eb /src/northbridge/amd | |
| parent | cc66ff3043bbd735e86bc9f58d654e4e91115ff5 (diff) | |
| download | coreboot-99eab34b9ed25065a0b4c3ebd051aa0155c77e6c.tar.gz coreboot-99eab34b9ed25065a0b4c3ebd051aa0155c77e6c.tar.bz2 coreboot-99eab34b9ed25065a0b4c3ebd051aa0155c77e6c.zip | |
amd/fam*/northbridge.c: Remove unused reset_memhole variable
Change-Id: I9231e0399d0b3ac6a608282571fc6d4aefad9dfb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63042
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge/amd')
| -rw-r--r-- | src/northbridge/amd/agesa/family14/northbridge.c | 5 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family15tn/northbridge.c | 5 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/northbridge.c | 5 |
3 files changed, 3 insertions, 12 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 77e68d8b24a9..3507ff709bce 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -510,7 +510,6 @@ static void domain_set_resources(struct device *dev) struct bus *link; #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; - u32 reset_memhole = 1; #endif pci_tolm = 0xffffffffUL; @@ -539,10 +538,8 @@ static void domain_set_resources(struct device *dev) mem_hole = get_hw_mem_hole_info(); // Use hole_basek as mmio_basek, and we don't need to reset hole anymore - if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { + if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) mmio_basek = mem_hole.hole_startk; - reset_memhole = 0; - } #endif idx = 0x10; diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 65be7d8a7278..d36c9d459df2 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -668,7 +668,6 @@ static void domain_set_resources(struct device *dev) struct bus *link; #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; - u32 reset_memhole = 1; #endif pci_tolm = 0xffffffffUL; @@ -697,10 +696,8 @@ static void domain_set_resources(struct device *dev) mem_hole = get_hw_mem_hole_info(); // Use hole_basek as mmio_basek, and we don't need to reset hole anymore - if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { + if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) mmio_basek = mem_hole.hole_startk; - reset_memhole = 0; - } #endif idx = 0x10; diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 1c630923c758..170a0d2ee26b 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -680,7 +680,6 @@ static void domain_set_resources(struct device *dev) struct bus *link; #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; - u32 reset_memhole = 1; #endif pci_tolm = 0xffffffffUL; @@ -709,10 +708,8 @@ static void domain_set_resources(struct device *dev) mem_hole = get_hw_mem_hole_info(); // Use hole_basek as mmio_basek, and we don't need to reset hole anymore - if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) { + if ((mem_hole.node_id != -1) && (mmio_basek > mem_hole.hole_startk)) mmio_basek = mem_hole.hole_startk; - reset_memhole = 0; - } #endif idx = 0x10; |