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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2011-10-31 14:18:33 +0200 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2011-10-31 15:34:04 +0100 |
commit | 0a0d5e8b86ccc8562ba9761bdd263ebf2667d3c6 (patch) | |
tree | c3420430b3318499242368b27781118e1d46dbbc /src/northbridge/intel/e7505/Kconfig | |
parent | 20fc631ad2c483fd2bc12e56f3ca8a1572688fb5 (diff) | |
download | coreboot-0a0d5e8b86ccc8562ba9761bdd263ebf2667d3c6.tar.gz coreboot-0a0d5e8b86ccc8562ba9761bdd263ebf2667d3c6.tar.bz2 coreboot-0a0d5e8b86ccc8562ba9761bdd263ebf2667d3c6.zip |
Add support for E7505 northbridge.
Adapted from northbridge/intel/e7501 with only minor changes.
This commit provides minimal patch from e7501 and I prefer any
cosmetic clean-up to be done after initial merge.
Due the incomplete register specifications, it is safer to have
e7505 as a separate directory in case I improve it to support
wider range of memory configurations. I have no e7501 to test with.
Change-Id: Iba3bf9d69ff5e9d9ef3a6ebf8259f048c55d637d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/295
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/e7505/Kconfig')
-rw-r--r-- | src/northbridge/intel/e7505/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig index c8219e89a2a9..578ab866d8a8 100644 --- a/src/northbridge/intel/e7505/Kconfig +++ b/src/northbridge/intel/e7505/Kconfig @@ -1,4 +1,4 @@ -config NORTHBRIDGE_INTEL_E7501 +config NORTHBRIDGE_INTEL_E7505 bool select HAVE_DEBUG_RAM_SETUP |