diff options
| author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
| commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
| tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/northbridge/intel/gm45/gm45.h | |
| parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
| download | coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.gz coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.bz2 coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.zip | |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/gm45/gm45.h')
| -rw-r--r-- | src/northbridge/intel/gm45/gm45.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h index 5bdf9e464dd7..a31ea7da4fe0 100644 --- a/src/northbridge/intel/gm45/gm45.h +++ b/src/northbridge/intel/gm45/gm45.h @@ -187,10 +187,15 @@ enum { (could be reduced to 10 bytes) */ +#ifndef __ACPI__ +#define DEFAULT_MCHBAR ((u8 *)0xfed14000) +#define DEFAULT_DMIBAR ((u8 *)0xfed18000) +#else #define DEFAULT_MCHBAR 0xfed14000 #define DEFAULT_DMIBAR 0xfed18000 +#endif #define DEFAULT_EPBAR 0xfed19000 -#define DEFAULT_HECIBAR 0xfed1a000 +#define DEFAULT_HECIBAR ((u8 *)0xfed1a000) /* 4 KB per PCIe device */ #define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS |