diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-01-26 11:50:04 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-06-07 06:40:55 +0000 |
| commit | f6d14773b24ef918bdafb1108ccbd87aa742fada (patch) | |
| tree | 413d91d025d7a4870e8368160198c1e22748a342 /src/northbridge/intel/i945/i945.h | |
| parent | 20c893e82c0cc4e9a44da048fdd5ba75ad9f547c (diff) | |
| download | coreboot-f6d14773b24ef918bdafb1108ccbd87aa742fada.tar.gz coreboot-f6d14773b24ef918bdafb1108ccbd87aa742fada.tar.bz2 coreboot-f6d14773b24ef918bdafb1108ccbd87aa742fada.zip | |
nb/intel/i945: Add a common function to compute TSEG size
This adds a common function to decode the TSEG size from the ESMRAM
register. This will come in handy when SMM in TSEG is implemented.
This function is used both in romstage and in ramstage.
Change-Id: I4e163598752fb6cd036aec229fce439ebad74def
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/23448
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945/i945.h')
| -rw-r--r-- | src/northbridge/intel/i945/i945.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h index 5929a1d01c18..cc5f08791f7a 100644 --- a/src/northbridge/intel/i945/i945.h +++ b/src/northbridge/intel/i945/i945.h @@ -365,6 +365,7 @@ void dump_spd_registers(void); void dump_mem(unsigned int start, unsigned int end); u32 decode_igd_memory_size(u32 gms); +u32 decode_tseg_size(const u8 esmramc); #endif /* __ACPI__ */ |