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| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-03-09 11:30:23 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-22 17:55:37 +0100 |
| commit | 70a8e34853d4b01ab7a2089821c35715c59b4415 (patch) | |
| tree | b39e19d126491bdf23a2026cc58374b019d169cb /src/northbridge/intel/i945/rcven.c | |
| parent | 219daafa8fc27483b2a652d9428d874bf960a6a1 (diff) | |
| download | coreboot-70a8e34853d4b01ab7a2089821c35715c59b4415.tar.gz coreboot-70a8e34853d4b01ab7a2089821c35715c59b4415.tar.bz2 coreboot-70a8e34853d4b01ab7a2089821c35715c59b4415.zip | |
nb/intel/i945: Fix errors found by checkpatch.pl
Change-Id: Ic2dd40e73d4a4c091c5ce1f49bbf9ab4d013d7af
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18704
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/i945/rcven.c')
| -rw-r--r-- | src/northbridge/intel/i945/rcven.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/src/northbridge/intel/i945/rcven.c b/src/northbridge/intel/i945/rcven.c index a6aaefa1bfe0..07580d1463e2 100644 --- a/src/northbridge/intel/i945/rcven.c +++ b/src/northbridge/intel/i945/rcven.c @@ -33,11 +33,10 @@ static u32 sample_strobes(int channel_offset, struct sys_info *sysinfo) addr = 0; if (channel_offset != 0) { /* must be dual channel */ - if (sysinfo->interleaved == 1) { + if (sysinfo->interleaved == 1) addr |= (1 << 6); - } else { + else addr = ((u32)MCHBAR8(C0DRB3)) << 25; - } } for (i = 0; i < 28; i++) { @@ -46,9 +45,8 @@ static u32 sample_strobes(int channel_offset, struct sys_info *sysinfo) } reg32 = MCHBAR32(RCVENMT); - if (channel_offset == 0) { + if (channel_offset == 0) reg32 = reg32 << 2; - } /** * [19] = 1: all bits are high @@ -99,7 +97,7 @@ static void set_receive_enable(int channel_offset, u8 medium, u8 coarse) } -static int normalize(int channel_offset, u8 * mediumcoarse, u8 * fine) +static int normalize(int channel_offset, u8 *mediumcoarse, u8 *fine) { printk(BIOS_SPEW, " normalize()\n"); @@ -122,7 +120,7 @@ static int normalize(int channel_offset, u8 * mediumcoarse, u8 * fine) return 0; } -static int find_preamble(int channel_offset, u8 * mediumcoarse, +static int find_preamble(int channel_offset, u8 *mediumcoarse, struct sys_info *sysinfo) { /* find start of the data phase */ @@ -156,7 +154,7 @@ static int find_preamble(int channel_offset, u8 * mediumcoarse, * add a quarter clock to the current receive enable settings */ -static int add_quarter_clock(int channel_offset, u8 * mediumcoarse, u8 * fine) +static int add_quarter_clock(int channel_offset, u8 *mediumcoarse, u8 *fine) { printk(BIOS_SPEW, " add_quarter_clock() mediumcoarse=%02x fine=%02x\n", *mediumcoarse, *fine); @@ -180,7 +178,7 @@ static int add_quarter_clock(int channel_offset, u8 * mediumcoarse, u8 * fine) return 0; } -static int find_strobes_low(int channel_offset, u8 * mediumcoarse, u8 * fine, +static int find_strobes_low(int channel_offset, u8 *mediumcoarse, u8 *fine, struct sys_info *sysinfo) { u32 rcvenmt; @@ -214,7 +212,7 @@ static int find_strobes_low(int channel_offset, u8 * mediumcoarse, u8 * fine, return 0; } -static int find_strobes_edge(int channel_offset, u8 * mediumcoarse, u8 * fine, +static int find_strobes_edge(int channel_offset, u8 *mediumcoarse, u8 *fine, struct sys_info *sysinfo) { @@ -313,9 +311,8 @@ static int receive_enable_autoconfig(int channel_offset, /* This is a debug check to see if the rcven code is fully working. * It can be removed when the output message is not printed anymore */ - if (MCHBAR8(C0WL0REOST + channel_offset) == 0) { + if (MCHBAR8(C0WL0REOST + channel_offset) == 0) printk(BIOS_DEBUG, "Weird. No C%sWL0REOST\n", channel_offset?"1":"0"); - } return 0; } |