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| author | Matt DeVillier <matt.devillier@gmail.com> | 2016-12-24 15:36:24 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-11 12:56:45 +0000 |
| commit | ff1ef8db4a383ff04d6ca4c4c464a06055f51137 (patch) | |
| tree | 7a2cc2c801ff4acdd6298b7a72e3503e920ce3af /src/northbridge/intel/sandybridge/raminit.h | |
| parent | 4d9694e6bc39b0447d70e96186b9bf707a08f038 (diff) | |
| download | coreboot-ff1ef8db4a383ff04d6ca4c4c464a06055f51137.tar.gz coreboot-ff1ef8db4a383ff04d6ca4c4c464a06055f51137.tar.bz2 coreboot-ff1ef8db4a383ff04d6ca4c4c464a06055f51137.zip | |
nb/intel/sandybridge: Populate meminfo when using MRC
Populate a memory_info struct with PEI and SPD data, in order to inject
the CBMEM_INFO table necessary to populate a type17 SMBIOS table.
On Broadwell, this is done by the MRC binary, but the older Sandy Bridge
MRC binary doesn't populate the pei_data struct with all the info
needed, so we have to pull it from the SPD.
Some values are hardcoded based on platform specifications.
Change-Id: I15e00a01121150b778cfa684b9147d0cac97beb8
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h index c5d881a19669..dd4e572119d0 100644 --- a/src/northbridge/intel/sandybridge/raminit.h +++ b/src/northbridge/intel/sandybridge/raminit.h @@ -13,5 +13,6 @@ void sdram_initialize(struct pei_data *pei_data); void save_mrc_data(struct pei_data *pei_data); void mainboard_fill_pei_data(struct pei_data *pei_data); int fixup_sandybridge_errata(void); +void setup_sdram_meminfo(struct pei_data *pei_data); #endif /* RAMINIT_H */ |