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authorAngel Pons <th3fanbus@gmail.com>2021-06-13 15:29:54 +0200
committerWerner Zeh <werner.zeh@siemens.com>2021-06-16 04:19:27 +0000
commitef5eb967ecc06b620f46065acc950bb70aaf6a7c (patch)
tree727ef24009993ca389fc722344ddcb0ead79616d /src/northbridge/intel
parent3838edeac672a7f61597e6d38e14c16a84329d60 (diff)
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nb/intel/haswell: Update some "Misc ICH" comments
One of the Memory32Fixed entries covers the TXT private and public spaces, and another covers the TPM registers. Update the comments. Change-Id: I261d74c113fabf1d152964efd8c91de85eba4179 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55462 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/haswell/acpi/hostbridge.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl
index 32e2998850d6..80d21d0d7225 100644
--- a/src/northbridge/intel/haswell/acpi/hostbridge.asl
+++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl
@@ -177,8 +177,8 @@ Device (PDRC)
Memory32Fixed (ReadWrite, CONFIG_FIXED_DMIBAR_MMIO_BASE, 0x00001000)
Memory32Fixed (ReadWrite, CONFIG_FIXED_EPBAR_MMIO_BASE, 0x00001000)
Memory32Fixed (ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH)
- Memory32Fixed (ReadWrite, 0xfed20000, 0x00020000) // Misc ICH
- Memory32Fixed (ReadWrite, 0xfed40000, 0x00005000) // Misc ICH
+ Memory32Fixed (ReadWrite, 0xfed20000, 0x00020000) // TXT
+ Memory32Fixed (ReadWrite, 0xfed40000, 0x00005000) // TPM
Memory32Fixed (ReadWrite, 0xfed45000, 0x0004b000) // Misc ICH
})