diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-06 22:18:21 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-16 17:08:55 +0000 |
| commit | 322b1c3d90200db2428554a9e1accfa07289930d (patch) | |
| tree | fd134e34722ba22af4dee0059df3827e5d75753d /src/northbridge | |
| parent | 567ece44eafaee3e1a3fef644efd018a877b533b (diff) | |
| download | coreboot-322b1c3d90200db2428554a9e1accfa07289930d.tar.gz coreboot-322b1c3d90200db2428554a9e1accfa07289930d.tar.bz2 coreboot-322b1c3d90200db2428554a9e1accfa07289930d.zip | |
haswell/lynxpoint: Add native early ME init
Implement native early ME init for Lynx Point. This is only needed when
MRC.bin is not used.
Change-Id: If416e2078f139f26b4742c564b70e018725bf003
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/native_raminit/raminit_native.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c index 0938e026e344..6a002548c105 100644 --- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c +++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c @@ -1,18 +1,24 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <console/console.h> +#include <delay.h> #include <northbridge/intel/haswell/haswell.h> #include <northbridge/intel/haswell/raminit.h> +#include <southbridge/intel/lynxpoint/me.h> #include <types.h> static bool early_init_native(int s3resume) { printk(BIOS_DEBUG, "Starting native platform initialisation\n"); + intel_early_me_init(); + /** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/ + const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check(); + if (!CONFIG(INTEL_LYNXPOINT_LP)) dmi_early_init(); - return false; + return cpu_replaced; } void perform_raminit(const int s3resume) @@ -25,6 +31,15 @@ void perform_raminit(const int s3resume) (void)cpu_replaced; + /** TODO: Move after raminit */ + if (intel_early_me_uma_size() > 0) { + /** TODO: Update status once raminit is implemented **/ + uint8_t me_status = ME_INIT_STATUS_ERROR; + intel_early_me_init_done(me_status); + } + + intel_early_me_status(); + /** TODO: Implement the required magic **/ die("NATIVE RAMINIT: More Magic (tm) required.\n"); } |