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author | Elyes Haouas <ehaouas@noos.fr> | 2022-12-03 13:26:05 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-06 19:44:41 +0000 |
commit | 421f1ee294e2a68872474869bbeb151cb36c94c8 (patch) | |
tree | ce3d7bcab5d2a8647232f6bdd4112da326b35d5b /src/northbridge | |
parent | 4b7d4054d9194647c30467a73b7ebc29d740b5b9 (diff) | |
download | coreboot-421f1ee294e2a68872474869bbeb151cb36c94c8.tar.gz coreboot-421f1ee294e2a68872474869bbeb151cb36c94c8.tar.bz2 coreboot-421f1ee294e2a68872474869bbeb151cb36c94c8.zip |
nb/intel/e7505: Use read32p()
Change-Id: I78337cf822cfae177b9ef3040641057a84e90e15
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70286
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r-- | src/northbridge/intel/e7505/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 2b81d37d5903..892bfadd23fe 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -659,7 +659,7 @@ static void do_ram_command(uint8_t command, uint16_t jedec_mode_bits) if (dimm_end_64M_multiple > dimm_start_64M_multiple) { dimm_start_address &= 0x3ffffff; dimm_start_address |= dimm_start_64M_multiple << 26; - read32((void *)dimm_start_address); + read32p(dimm_start_address); // Set the start of the next DIMM dimm_start_64M_multiple = dimm_end_64M_multiple; } |