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authorAngel Pons <th3fanbus@gmail.com>2022-11-06 16:10:43 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2023-02-09 21:41:18 +0000
commit72de822ddc9e6ad04e2a04981d48eafe0b17c33b (patch)
tree777773e9b227d454196e251d10ac0d481a08662c /src/northbridge
parent434d7d45829ed9da41b17fe56fe7affca001be21 (diff)
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nb/intel/haswell: Add 9-series PCH IDs
Change-Id: I5b7b1c218a0e8c8ba713b370622fbc37a1e57097 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69259 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/report_platform.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 6700e681c27f..b63336fe411f 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -67,6 +67,11 @@ static struct {
{0x8c54, "C224"},
{0x8c56, "C226"},
{0x8c5c, "H81"},
+ {0x8cc1, "Mobile Engineering Sample (9 series)"},
+ {0x8cc2, "Desktop Engineering Sample (9 series)"},
+ {0x8cc3, "HM97"},
+ {0x8cc4, "Z97"},
+ {0x8cc6, "H97"},
{0x9c41, "LP Full Featured Engineering Sample"},
{0x9c43, "LP Premium"},
{0x9c45, "LP Mainstream"},