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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-11-17 17:23:47 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-19 13:13:22 +0000 |
| commit | ce8dfc51ecccacc285e83d102679583c6094b42e (patch) | |
| tree | df1dffbbe924efc9b1334888ec7ce707e168d7e0 /src/northbridge | |
| parent | 606e5636c2164aa047cf809029012e7ca90bf6c1 (diff) | |
| download | coreboot-ce8dfc51ecccacc285e83d102679583c6094b42e.tar.gz coreboot-ce8dfc51ecccacc285e83d102679583c6094b42e.tar.bz2 coreboot-ce8dfc51ecccacc285e83d102679583c6094b42e.zip | |
nb/amd/pi/00730F01/northbridge: simplify domain_read_resources
This APU is always a single-node, so domain_read_resources only needs to
handle exactly one node and doesn't need to loop over the nodes.
TEST=PC Engines APU2 still boots and doesn't show any new problems
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4218077cb4e11b762ce0e8694a97bdec33eaa056
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79605
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 60b63132631b..d138387ce92d 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -614,7 +614,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) static void domain_read_resources(struct device *dev) { unsigned long mmio_basek; - int i, idx; + int idx; #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; #endif @@ -640,27 +640,23 @@ static void domain_read_resources(struct device *dev) #endif idx = 0x10; - for (i = 0; i < get_node_nums(); i++) { - resource_t basek, limitk, sizek; // 4 1T - - if (!get_dram_base_limit(i, &basek, &limitk)) - continue; // no memory on this node - + resource_t basek, limitk, sizek; + if (get_dram_base_limit(0, &basek, &limitk)) { sizek = limitk - basek; - printk(BIOS_DEBUG, "node %d: basek=%08llx, limitk=%08llx, sizek=%08llx,\n", - i, basek, limitk, sizek); + printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n", + basek, limitk, sizek); /* See if we need a hole from 0xa0000 (640K) to 0xfffff (1024K) */ if (basek < 640 && sizek > 1024) { - ram_resource_kb(dev, (idx | i), basek, 640 - basek); + ram_resource_kb(dev, idx, basek, 640 - basek); idx += 0x10; basek = 1024; sizek = limitk - basek; } - printk(BIOS_DEBUG, "node %d: basek=%08llx, limitk=%08llx, sizek=%08llx,\n", - i, basek, limitk, sizek); + printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n", + basek, limitk, sizek); /* split the region to accommodate pci memory space */ if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) { @@ -668,7 +664,7 @@ static void domain_read_resources(struct device *dev) unsigned int pre_sizek; pre_sizek = mmio_basek - basek; if (pre_sizek > 0) { - ram_resource_kb(dev, (idx | i), basek, pre_sizek); + ram_resource_kb(dev, idx, basek, pre_sizek); idx += 0x10; sizek -= pre_sizek; } @@ -684,10 +680,10 @@ static void domain_read_resources(struct device *dev) } } - ram_resource_kb(dev, (idx | i), basek, sizek); + ram_resource_kb(dev, idx, basek, sizek); idx += 0x10; - printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", - i, mmio_basek, basek, limitk); + printk(BIOS_DEBUG, "mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", + mmio_basek, basek, limitk); } add_uma_resource_below_tolm(dev, 7); |