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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-17 18:20:01 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-19 13:14:27 +0000 |
| commit | dcbb1e8b61cc668260228da2dfc90d3e99b3764b (patch) | |
| tree | ada8e5390911ae16e6f0a53e1a0fd5c47c2baab6 /src/northbridge | |
| parent | 3eaa850c6aed2df454007c059a3ca01496666c5a (diff) | |
| download | coreboot-dcbb1e8b61cc668260228da2dfc90d3e99b3764b.tar.gz coreboot-dcbb1e8b61cc668260228da2dfc90d3e99b3764b.tar.bz2 coreboot-dcbb1e8b61cc668260228da2dfc90d3e99b3764b.zip | |
nb/amd/pi/00730F01/northbridge: rework idx in domain_read_resources
Start with the resource index 0 and increment it after reporting each
resource.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I6fb59ff3d371b744b53093d17392d1c3510bef82
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/amd/pi/00730F01/northbridge.c | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index c9469ced01b2..9da8465d4af0 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -586,7 +586,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) static void domain_read_resources(struct device *dev) { unsigned long mmio_basek; - int idx; + unsigned long idx = 0; #if CONFIG_HW_MEM_HOLE_SIZEK != 0 struct hw_mem_hole_info mem_hole; #endif @@ -611,7 +611,6 @@ static void domain_read_resources(struct device *dev) } #endif - idx = 0x10; resource_t basek, limitk, sizek; if (get_dram_base_limit(&basek, &limitk)) { sizek = limitk - basek; @@ -621,8 +620,7 @@ static void domain_read_resources(struct device *dev) /* See if we need a hole from 0xa0000 (640K) to 0xfffff (1024K) */ if (basek < 640 && sizek > 1024) { - ram_resource_kb(dev, idx, basek, 640 - basek); - idx += 0x10; + ram_resource_kb(dev, idx++, basek, 640 - basek); basek = 1024; sizek = limitk - basek; } @@ -636,8 +634,7 @@ static void domain_read_resources(struct device *dev) unsigned int pre_sizek; pre_sizek = mmio_basek - basek; if (pre_sizek > 0) { - ram_resource_kb(dev, idx, basek, pre_sizek); - idx += 0x10; + ram_resource_kb(dev, idx++, basek, pre_sizek); sizek -= pre_sizek; } basek = mmio_basek; @@ -652,13 +649,12 @@ static void domain_read_resources(struct device *dev) } } - ram_resource_kb(dev, idx, basek, sizek); - idx += 0x10; + ram_resource_kb(dev, idx++, basek, sizek); printk(BIOS_DEBUG, "mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", mmio_basek, basek, limitk); } - add_uma_resource_below_tolm(dev, 7); + add_uma_resource_below_tolm(dev, idx++); } static const char *domain_acpi_name(const struct device *dev) |