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| author | Martin Roth <martinroth@chromium.org> | 2021-07-20 16:49:34 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-07-24 17:22:21 +0000 |
| commit | 8baa9dfe1e51b8f00569b8be6d799bf3c2ed53ea (patch) | |
| tree | 4e62fce32b70629b1a2cf9181972dbaa73ab2a2a /src/security | |
| parent | 3c3d2cf77fc96a789d51c58be626a8657d4650ad (diff) | |
| download | coreboot-8baa9dfe1e51b8f00569b8be6d799bf3c2ed53ea.tar.gz coreboot-8baa9dfe1e51b8f00569b8be6d799bf3c2ed53ea.tar.bz2 coreboot-8baa9dfe1e51b8f00569b8be6d799bf3c2ed53ea.zip | |
mb/google/guybrush: Update GPIOs settings
- The WWAN card was being disabled later than desired.
- The SD card was never being placed into reset on BoardID 1.
- Enable Touchscreen power
- Enable PCIe_RST1 at the same points as PCIe_RST
- Remove Redundant Bootblock settings
BUG=b:193036827
TEST=Build & Boot, look at GPIO states through boot process
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I5431da755d98e4ad0b300d01cac562d61db0bc08
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/security')
0 files changed, 0 insertions, 0 deletions