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| author | Martin Roth <martinroth@chromium.org> | 2021-04-23 12:22:59 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-04-26 20:55:34 +0000 |
| commit | 029d997b6eb0c784b844bf554dec5c33286b6507 (patch) | |
| tree | 7838228ee200825c6ccde28d679eceb958401e6d /src/soc/amd/cezanne/chip.h | |
| parent | 109c4d05d6495dd3a6c480b1ccbd3183109eb63e (diff) | |
| download | coreboot-029d997b6eb0c784b844bf554dec5c33286b6507.tar.gz coreboot-029d997b6eb0c784b844bf554dec5c33286b6507.tar.bz2 coreboot-029d997b6eb0c784b844bf554dec5c33286b6507.zip | |
amd/cezanne: Add slow_ppt_time & thermctl_limit to UPD
These values will be added in the upcoming STAPM configuration update.
BUG=b:185209734
TEST=Build & Boot guybrush
Cq-Depend: chrome-internal:3780259
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I2a6835c16badfe505e3c33b356ca671766cd6972
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Peers <epeers@google.com>
Reviewed-by: chris wang <Chris.Wang@amd.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne/chip.h')
| -rw-r--r-- | src/soc/amd/cezanne/chip.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/chip.h b/src/soc/amd/cezanne/chip.h index 7753ab862342..4c5118e91477 100644 --- a/src/soc/amd/cezanne/chip.h +++ b/src/soc/amd/cezanne/chip.h @@ -55,6 +55,8 @@ struct soc_amd_cezanne_config { uint32_t sustained_power_limit; uint32_t fast_ppt_limit; uint32_t slow_ppt_limit; + uint32_t slow_ppt_time_constant_s; + uint32_t thermctl_limit_degreeC; uint8_t smartshift_enable; |