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| author | Zheng Bao <fishbaozi@gmail.com> | 2021-03-16 15:28:49 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-03-22 03:43:25 +0000 |
| commit | b0f00ed4268573269c5f2085da1c92566768ece3 (patch) | |
| tree | f0b39c870819c39966b9aade0eed4dcc30f515b3 /src/soc/amd/cezanne/early_fch.c | |
| parent | 7a0b9c5e7369dc98e559e821864e324e3881ec49 (diff) | |
| download | coreboot-b0f00ed4268573269c5f2085da1c92566768ece3.tar.gz coreboot-b0f00ed4268573269c5f2085da1c92566768ece3.tar.bz2 coreboot-b0f00ed4268573269c5f2085da1c92566768ece3.zip | |
soc/amd/cezanne: Get I2C specific code for cezanne
Add macros, settings and callbacks to support I2C for cezanne.
Change-Id: Ic480681d4b7c6fb8591e729090e4faeb5fccf800
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51025
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/amd/cezanne/early_fch.c')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index cdb1f12aadb9..0bab87ff8aa9 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -4,10 +4,33 @@ #include <amdblocks/espi.h> #include <amdblocks/lpc.h> #include <amdblocks/smbus.h> +#include <amdblocks/i2c.h> #include <console/console.h> +#include <soc/i2c.h> #include <soc/southbridge.h> #include <soc/uart.h> +#include "chip.h" + +/* This table is for the initial conversion of all SCL pins to input with no pull. */ +static const struct soc_i2c_scl_pin i2c_scl_pins[] = { + { PAD_GPI(I2C0_SCL_PIN, PULL_NONE), GPIO_I2C0_SCL }, + { PAD_GPI(I2C1_SCL_PIN, PULL_NONE), GPIO_I2C1_SCL }, + { PAD_GPI(I2C2_SCL_PIN, PULL_NONE), GPIO_I2C2_SCL }, + { PAD_GPI(I2C3_SCL_PIN, PULL_NONE), GPIO_I2C3_SCL }, +}; + +static void reset_i2c_peripherals(void) +{ + const struct soc_amd_cezanne_config *cfg = config_of_soc(); + struct soc_i2c_peripheral_reset_info reset_info; + + reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; + reset_info.i2c_scl = i2c_scl_pins; + reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins); + sb_reset_i2c_peripherals(&reset_info); +} + /* Before console init */ void fch_pre_init(void) { @@ -19,6 +42,7 @@ void fch_pre_init(void) fch_enable_legacy_io(); fch_disable_legacy_dma_io(); enable_aoac_devices(); + reset_i2c_peripherals(); /* * On reset Range_0 defaults to enabled. We want to start with a clean |