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| author | Michael Niewöhner <foss@mniewoehner.de> | 2021-10-05 22:22:21 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-21 20:03:14 +0000 |
| commit | 38107fa80eb81fe5077dbee0dd9a46618c71a196 (patch) | |
| tree | d8f040f30350f52a5ccc8fcc63ef37042e08ff46 /src/soc/amd/cezanne/include/soc/cppc.h | |
| parent | 679f4fa46578267989b55635e50ef500f7327338 (diff) | |
| download | coreboot-38107fa80eb81fe5077dbee0dd9a46618c71a196.tar.gz coreboot-38107fa80eb81fe5077dbee0dd9a46618c71a196.tar.bz2 coreboot-38107fa80eb81fe5077dbee0dd9a46618c71a196.zip | |
acpigen,soc/amd,cpu/intel: rework static DWORD for CPPC table
Some elements in the ACPI CPPC table allow static DWORDs. Instead of
using a fake register resource, use a tagged union with the two types
"register" and "DWORD" and respective macros for CPPC table entries.
Test: dumped SSDT before and after do not differ.
Change-Id: Ib853261b5c0ea87ae2424fed188f2d1872be9a06
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne/include/soc/cppc.h')
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/cppc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/include/soc/cppc.h b/src/soc/amd/cezanne/include/soc/cppc.h index 60a5efd33417..e2f4daaf4976 100644 --- a/src/soc/amd/cezanne/include/soc/cppc.h +++ b/src/soc/amd/cezanne/include/soc/cppc.h @@ -4,6 +4,7 @@ #define _CPU_AMD_COMMON_H #include <types.h> +#include <acpi/acpigen.h> struct cppc_config; void cpu_init_cppc_config(struct cppc_config *config, u32 version); |