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| author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-02 19:27:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-03 23:44:00 +0000 |
| commit | 42d8cbf4d28fb13169a413c16507495f18fb9bab (patch) | |
| tree | fdf1d5525691eed55599d5c714ea660e02cadb2f /src/soc/amd/cezanne/include/soc/southbridge.h | |
| parent | 429971a5fb8fbfd08223f55adb8df6ff13471930 (diff) | |
| download | coreboot-42d8cbf4d28fb13169a413c16507495f18fb9bab.tar.gz coreboot-42d8cbf4d28fb13169a413c16507495f18fb9bab.tar.bz2 coreboot-42d8cbf4d28fb13169a413c16507495f18fb9bab.zip | |
soc/amd/*/i2c: drop unused mainboard_i2c_override
No mainboard in the current tree implements mainboard_i2c_override. In a
follow-up commit the i2c_pad_control struct is introduced to be able to
make more parameters controllable by devicetree settings in the future.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8f9ed5d50d26e4623dc5888cc8af090fdd00fc03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61566
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/cezanne/include/soc/southbridge.h')
| -rw-r--r-- | src/soc/amd/cezanne/include/soc/southbridge.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/include/soc/southbridge.h b/src/soc/amd/cezanne/include/soc/southbridge.h index 4f372adf944d..113395e954fc 100644 --- a/src/soc/amd/cezanne/include/soc/southbridge.h +++ b/src/soc/amd/cezanne/include/soc/southbridge.h @@ -147,7 +147,4 @@ void fch_final(void *chip_info); void enable_aoac_devices(void); void wait_for_aoac_enabled(unsigned int dev); -/* Allow the board to change the default I2C pad configuration */ -void mainboard_i2c_override(int bus, uint32_t *pad_settings); - #endif /* AMD_CEZANNE_SOUTHBRIDGE_H */ |