diff options
| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-09-17 16:33:35 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-09-27 13:40:10 +0000 |
| commit | 1140b7cc726912ecd6b554398e3f6cfb1f72a8d2 (patch) | |
| tree | d5ddef7ef4c14cf3f8295ef03c06022db3819d3b /src/soc/amd/cezanne | |
| parent | c2f6f35b3a23a8c598dc0f13f7248f3567d8aaa2 (diff) | |
| download | coreboot-1140b7cc726912ecd6b554398e3f6cfb1f72a8d2.tar.gz coreboot-1140b7cc726912ecd6b554398e3f6cfb1f72a8d2.tar.bz2 coreboot-1140b7cc726912ecd6b554398e3f6cfb1f72a8d2.zip | |
soc/amd/cezanne: Enable CCP DMA
Enable CCP DMA use in PSP verstage. This helps to reduce the boot time.
BUG=b:194990811
TEST=Build and boot to OS in Guybrush. Observed a 35 - 40 ms improvement
in the boot time.
Before CCP DMA:
508:finished loading body 898,286 (287,576)
Total Time: 2,146,182
After CCP DMA:
508:finished loading body 853,627 (240,061)
Total Time: 2,110,117
Cq-Depend: chrome-internal:4116566
Change-Id: I6e4f081622a2ec78763adf56548204efc1bccf39
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57564
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 46e60173c666..487b9f5b79fb 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -32,6 +32,7 @@ config SOC_SPECIFIC_OPTIONS select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING + select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON |