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| author | Raul E Rangel <rrangel@chromium.org> | 2021-11-08 16:58:26 -0700 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-13 00:20:21 +0000 |
| commit | 2bcf99fcc4bbdca7edb6a0c616e0a73649833614 (patch) | |
| tree | de9d35e318785bc6f2ee3ad9d3add090d0c6fdb2 /src/soc/amd/cezanne | |
| parent | c6076ef1bca60a7e82cc7d0931f7adcd9ae8d05a (diff) | |
| download | coreboot-2bcf99fcc4bbdca7edb6a0c616e0a73649833614.tar.gz coreboot-2bcf99fcc4bbdca7edb6a0c616e0a73649833614.tar.bz2 coreboot-2bcf99fcc4bbdca7edb6a0c616e0a73649833614.zip | |
sod/amd/cezanne: Use LZ4 for FSP-M when using SPI DMA
This change adds about 30 KiB to FSP-M. When not using the SPI DMA
controller, this change actually has a ~7 ms boot time penalty. When
we use the DMA engine, we end up with about a 5 ms decrease. Once we
switch to 100 MHz SPI this will help even more since we have effectively
eliminated the decompression time.
BUG=b:179699789
TEST=Boot nipperkin to OS and take boot time measurements
fspm.bin 0x2efc0 fsp 90953 LZMA (233472 decompressed)
fspm.bin 0x2cfc0 fsp 121156 LZ4 (233472 decompressed)
- FSP-M / no async -
| 508 - finished loading body | 177.019 | 179.384 Δ( 2.36, 0.16%) |
...
| 970 - loading FSP-M | 0.346 | 0.346 Δ( 0.00, 0.00%) |
| 17 - starting LZ4 decompress (ignore for x86) | 0.009 | 0.01 Δ( 0.00, 0.00%) |
| 18 - finished LZ4 decompress (ignore for x86) | 53.916 | 59.475 Δ( 5.56, 0.37%) |
- FSP-M / async -
| 508 - finished loading body | 177.185 | 179.689 Δ( 2.50, 0.18%) |
...
| 970 - loading FSP-M | 0.989 | 0.99 Δ( 0.00, 0.00%) |
| 17 - starting LZ4 decompress (ignore for x86) | 9.483 | 12.877 Δ( 3.39, 0.24%) |
| 18 - finished LZ4 decompress (ignore for x86) | 10.833 | 0.312 Δ(-10.52, -0.75%) |
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I7d0363d27d98d4ed3afc6f802a13ff7986391921
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59029
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index aaa3811097e0..3fb5085c3b20 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -20,7 +20,8 @@ config SOC_SPECIFIC_OPTIONS select DRIVERS_USB_ACPI select DRIVERS_I2C_DESIGNWARE select DRIVERS_USB_PCI_XHCI - select FSP_COMPRESS_FSP_M_LZMA + select FSP_COMPRESS_FSP_M_LZMA if !ASYNC_FILE_LOADING + select FSP_COMPRESS_FSP_M_LZ4 if ASYNC_FILE_LOADING select FSP_COMPRESS_FSP_S_LZ4 select GENERIC_GPIO_LIB select HAVE_ACPI_TABLES |